1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=amdgcn -mcpu=gfx940 --timeline --iterations=1 --timeline-max-cycles=0 < %s | FileCheck %s 3 4v_pk_mov_b32 v[0:1], v[2:3], v[4:5] 5v_pk_add_f32 v[0:1], v[0:1], v[0:1] 6v_pk_mul_f32 v[0:1], v[0:1], v[0:1] 7v_add_co_u32 v5, s[0:1], v1, v2 8v_sub_co_u32 v5, s[0:1], v1, v2 9v_add_u32 v5, v1, v2 10v_sub_u32 v5, v1, v2 11 12# CHECK: Iterations: 1 13# CHECK-NEXT: Instructions: 7 14# CHECK-NEXT: Total Cycles: 10 15# CHECK-NEXT: Total uOps: 9 16 17# CHECK: Dispatch Width: 1 18# CHECK-NEXT: uOps Per Cycle: 0.90 19# CHECK-NEXT: IPC: 0.70 20# CHECK-NEXT: Block RThroughput: 9.0 21 22# CHECK: Instruction Info: 23# CHECK-NEXT: [1]: #uOps 24# CHECK-NEXT: [2]: Latency 25# CHECK-NEXT: [3]: RThroughput 26# CHECK-NEXT: [4]: MayLoad 27# CHECK-NEXT: [5]: MayStore 28# CHECK-NEXT: [6]: HasSideEffects (U) 29 30# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 31# CHECK-NEXT: 1 1 1.00 U v_pk_mov_b32 v[0:1], v[2:3], v[4:5] 32# CHECK-NEXT: 1 1 1.00 U v_pk_add_f32 v[0:1], v[0:1], v[0:1] 33# CHECK-NEXT: 1 1 1.00 U v_pk_mul_f32 v[0:1], v[0:1], v[0:1] 34# CHECK-NEXT: 2 1 1.00 U v_add_co_u32_e64 v5, s[0:1], v1, v2 35# CHECK-NEXT: 2 1 1.00 U v_sub_co_u32_e64 v5, s[0:1], v1, v2 36# CHECK-NEXT: 1 1 1.00 U v_add_u32_e32 v5, v1, v2 37# CHECK-NEXT: 1 1 1.00 U v_sub_u32_e32 v5, v1, v2 38 39# CHECK: Resources: 40# CHECK-NEXT: [0] - HWBranch 41# CHECK-NEXT: [1] - HWExport 42# CHECK-NEXT: [2] - HWLGKM 43# CHECK-NEXT: [3] - HWSALU 44# CHECK-NEXT: [4] - HWVALU 45# CHECK-NEXT: [5] - HWVMEM 46# CHECK-NEXT: [6] - HWXDL 47 48# CHECK: Resource pressure per iteration: 49# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] 50# CHECK-NEXT: - - - 2.00 7.00 - - 51 52# CHECK: Resource pressure by instruction: 53# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] Instructions: 54# CHECK-NEXT: - - - - 1.00 - - v_pk_mov_b32 v[0:1], v[2:3], v[4:5] 55# CHECK-NEXT: - - - - 1.00 - - v_pk_add_f32 v[0:1], v[0:1], v[0:1] 56# CHECK-NEXT: - - - - 1.00 - - v_pk_mul_f32 v[0:1], v[0:1], v[0:1] 57# CHECK-NEXT: - - - 1.00 1.00 - - v_add_co_u32_e64 v5, s[0:1], v1, v2 58# CHECK-NEXT: - - - 1.00 1.00 - - v_sub_co_u32_e64 v5, s[0:1], v1, v2 59# CHECK-NEXT: - - - - 1.00 - - v_add_u32_e32 v5, v1, v2 60# CHECK-NEXT: - - - - 1.00 - - v_sub_u32_e32 v5, v1, v2 61 62# CHECK: Timeline view: 63# CHECK-NEXT: Index 0123456789 64 65# CHECK: [0,0] DE . . v_pk_mov_b32 v[0:1], v[2:3], v[4:5] 66# CHECK-NEXT: [0,1] .DE . . v_pk_add_f32 v[0:1], v[0:1], v[0:1] 67# CHECK-NEXT: [0,2] . DE . . v_pk_mul_f32 v[0:1], v[0:1], v[0:1] 68# CHECK-NEXT: [0,3] . DE. . v_add_co_u32_e64 v5, s[0:1], v1, v2 69# CHECK-NEXT: [0,4] . DeE . v_sub_co_u32_e64 v5, s[0:1], v1, v2 70# CHECK-NEXT: [0,5] . . DE. v_add_u32_e32 v5, v1, v2 71# CHECK-NEXT: [0,6] . . DE v_sub_u32_e32 v5, v1, v2 72 73# CHECK: Average Wait times (based on the timeline view): 74# CHECK-NEXT: [0]: Executions 75# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 76# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 77# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 78 79# CHECK: [0] [1] [2] [3] 80# CHECK-NEXT: 0. 1 0.0 0.0 0.0 v_pk_mov_b32 v[0:1], v[2:3], v[4:5] 81# CHECK-NEXT: 1. 1 0.0 0.0 0.0 v_pk_add_f32 v[0:1], v[0:1], v[0:1] 82# CHECK-NEXT: 2. 1 0.0 0.0 0.0 v_pk_mul_f32 v[0:1], v[0:1], v[0:1] 83# CHECK-NEXT: 3. 1 0.0 0.0 0.0 v_add_co_u32_e64 v5, s[0:1], v1, v2 84# CHECK-NEXT: 4. 1 0.0 0.0 0.0 v_sub_co_u32_e64 v5, s[0:1], v1, v2 85# CHECK-NEXT: 5. 1 0.0 0.0 0.0 v_add_u32_e32 v5, v1, v2 86# CHECK-NEXT: 6. 1 0.0 0.0 0.0 v_sub_u32_e32 v5, v1, v2 87# CHECK-NEXT: 1 0.0 0.0 0.0 <total> 88