1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M3 3# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M4 4# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M5 5 6fsqrt s31, s31 7 8# Newton series for sqrtf(). 9frsqrte s1, s0 10fmul s2, s1, s1 11frsqrts s2, s0, s2 12fmul s1, s1, s2 13fmul s2, s1, s1 14frsqrts s2, s0, s2 15fmul s2, s2, s0 16fmul s1, s1, s2 17fcmp s0, #0.0 18fcsel s0, s0, s1, eq 19 20# ALL: Iterations: 100 21# ALL-NEXT: Instructions: 1100 22 23# M3-NEXT: Total Cycles: 3203 24# M4-NEXT: Total Cycles: 3103 25# M5-NEXT: Total Cycles: 2803 26 27# ALL-NEXT: Total uOps: 1200 28 29# ALL: Dispatch Width: 6 30 31# M3-NEXT: uOps Per Cycle: 0.37 32# M3-NEXT: IPC: 0.34 33# M3-NEXT: Block RThroughput: 20.0 34 35# M4-NEXT: uOps Per Cycle: 0.39 36# M4-NEXT: IPC: 0.35 37# M4-NEXT: Block RThroughput: 2.3 38 39# M5-NEXT: uOps Per Cycle: 0.43 40# M5-NEXT: IPC: 0.39 41# M5-NEXT: Block RThroughput: 2.3 42 43# ALL: Instruction Info: 44# ALL-NEXT: [1]: #uOps 45# ALL-NEXT: [2]: Latency 46# ALL-NEXT: [3]: RThroughput 47# ALL-NEXT: [4]: MayLoad 48# ALL-NEXT: [5]: MayStore 49# ALL-NEXT: [6]: HasSideEffects (U) 50 51# ALL: [1] [2] [3] [4] [5] [6] Instructions: 52 53# M3-NEXT: 1 18 19.00 fsqrt s31, s31 54# M3-NEXT: 1 4 0.50 frsqrte s1, s0 55 56# M4-NEXT: 1 8 1.75 fsqrt s31, s31 57# M4-NEXT: 1 3 0.50 frsqrte s1, s0 58 59# M5-NEXT: 1 8 1.25 fsqrt s31, s31 60# M5-NEXT: 1 3 0.50 frsqrte s1, s0 61 62# ALL-NEXT: 1 3 0.33 fmul s2, s1, s1 63# ALL-NEXT: 1 4 0.33 frsqrts s2, s0, s2 64# ALL-NEXT: 1 3 0.33 fmul s1, s1, s2 65# ALL-NEXT: 1 3 0.33 fmul s2, s1, s1 66# ALL-NEXT: 1 4 0.33 frsqrts s2, s0, s2 67# ALL-NEXT: 1 3 0.33 fmul s2, s2, s0 68# ALL-NEXT: 1 3 0.33 fmul s1, s1, s2 69# ALL-NEXT: 1 2 1.00 fcmp s0, #0.0 70 71# M3-NEXT: 2 5 1.00 fcsel s0, s0, s1, eq 72# M4-NEXT: 2 5 1.00 fcsel s0, s0, s1, eq 73# M5-NEXT: 2 2 1.00 fcsel s0, s0, s1, eq 74