1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M3 3# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M4 4# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M5 5 6fmov s31, #1.00000000 7fdiv s30, s31, s30 8 9# Newton series for 1 / x. 10frecpe s1, s0 11frecps s2, s0, s1 12fmul s1, s1, s2 13frecps s0, s0, s1 14fmul s0, s1, s0 15 16# ALL: Iterations: 100 17# ALL-NEXT: Instructions: 700 18 19# M3-NEXT: Total Cycles: 1803 20# M4-NEXT: Total Cycles: 1703 21# M5-NEXT: Total Cycles: 1703 22 23# ALL-NEXT: Total uOps: 700 24 25# ALL: Dispatch Width: 6 26 27# M3-NEXT: uOps Per Cycle: 0.39 28# M3-NEXT: IPC: 0.39 29# M3-NEXT: Block RThroughput: 2.0 30 31# M4-NEXT: uOps Per Cycle: 0.41 32# M4-NEXT: IPC: 0.41 33# M4-NEXT: Block RThroughput: 1.5 34 35# M5-NEXT: uOps Per Cycle: 0.41 36# M5-NEXT: IPC: 0.41 37# M5-NEXT: Block RThroughput: 1.3 38 39# ALL: Instruction Info: 40# ALL-NEXT: [1]: #uOps 41# ALL-NEXT: [2]: Latency 42# ALL-NEXT: [3]: RThroughput 43# ALL-NEXT: [4]: MayLoad 44# ALL-NEXT: [5]: MayStore 45# ALL-NEXT: [6]: HasSideEffects (U) 46 47# ALL: [1] [2] [3] [4] [5] [6] Instructions: 48# ALL-NEXT: 1 1 0.33 fmov s31, #1.00000000 49 50# M3-NEXT: 1 7 2.00 fdiv s30, s31, s30 51# M3-NEXT: 1 4 0.50 frecpe s1, s0 52 53# M4-NEXT: 1 7 1.50 fdiv s30, s31, s30 54# M4-NEXT: 1 3 0.50 frecpe s1, s0 55 56# M5-NEXT: 1 7 1.00 fdiv s30, s31, s30 57# M5-NEXT: 1 3 0.50 frecpe s1, s0 58 59# ALL-NEXT: 1 4 0.33 frecps s2, s0, s1 60# ALL-NEXT: 1 3 0.33 fmul s1, s1, s2 61# ALL-NEXT: 1 4 0.33 frecps s0, s0, s1 62# ALL-NEXT: 1 3 0.33 fmul s0, s1, s0 63