xref: /llvm-project/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.funcsig.expected (revision 407600604b59ff9970894194eeec62580437a47a)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
2; Example input for update_test_checks (taken from test/Transforms/InstSimplify/add.ll)
3; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
4
5define i32 @common_sub_operand(i32 %X, i32 %Y) {
6; CHECK-LABEL: define {{[^@]+}}@common_sub_operand
7; CHECK-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) {
8; CHECK-NEXT:    ret i32 [[X]]
9;
10  %Z = sub i32 %X, %Y
11  %Q = add i32 %Z, %Y
12  ret i32 %Q
13}
14
15define i32 @negated_operand(i32 %x) {
16; CHECK-LABEL: define {{[^@]+}}@negated_operand
17; CHECK-SAME: (i32 [[X:%.*]]) {
18; CHECK-NEXT:    ret i32 0
19;
20  %negx = sub i32 0, %x
21  %r = add i32 %negx, %x
22  ret i32 %r
23}
24
25define <2 x i32> @negated_operand_commute_vec(<2 x i32> %x) {
26; CHECK-LABEL: define {{[^@]+}}@negated_operand_commute_vec
27; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
28; CHECK-NEXT:    ret <2 x i32> zeroinitializer
29;
30  %negx = sub <2 x i32> zeroinitializer, %x
31  %r = add <2 x i32> %x, %negx
32  ret <2 x i32> %r
33}
34
35define i8 @knownnegation(i8 %x, i8 %y) {
36; CHECK-LABEL: define {{[^@]+}}@knownnegation
37; CHECK-SAME: (i8 [[X:%.*]], i8 [[Y:%.*]]) {
38; CHECK-NEXT:    ret i8 0
39;
40  %xy = sub i8 %x, %y
41  %yx = sub i8 %y, %x
42  %r = add i8 %xy, %yx
43  ret i8 %r
44}
45
46define <2 x i8> @knownnegation_commute_vec(<2 x i8> %x, <2 x i8> %y) {
47; CHECK-LABEL: define {{[^@]+}}@knownnegation_commute_vec
48; CHECK-SAME: (<2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) {
49; CHECK-NEXT:    ret <2 x i8> zeroinitializer
50;
51  %xy = sub <2 x i8> %x, %y
52  %yx = sub <2 x i8> %y, %x
53  %r = add <2 x i8> %yx, %xy
54  ret <2 x i8> %r
55}
56
57define i32 @nameless_value(i32 %X) {
58; CHECK-LABEL: define {{[^@]+}}@nameless_value
59; CHECK-SAME: (i32 [[X:%.*]]) {
60; CHECK-NEXT:    [[TMP1:%.*]] = sub i32 42, [[X]]
61; CHECK-NEXT:    ret i32 [[TMP1]]
62;
63  %1 = sub i32 42, %X
64  ret i32 %1
65}
66