1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-unknown-unknown -run-pass=finalize-isel -verify-machineinstrs  %s -o - | FileCheck %s --check-prefixes=CHECK
3
4--- |
5
6
7  define float @check_MI_flags(float %f) {
8    %div = fdiv nsz float 1.000000e+00, %f
9    ret float %div
10  }
11
12...
13---
14name:            check_MI_flags
15alignment:       16
16exposesReturnsTwice: false
17legalized:       false
18regBankSelected: false
19selected:        false
20failedISel:      false
21tracksRegLiveness: true
22hasWinCFI:       false
23callsEHReturn:   false
24callsUnwindInit: false
25hasEHCatchret:   false
26hasEHScopes:     false
27hasEHFunclets:   false
28failsVerification: false
29tracksDebugUserValues: false
30registers:
31  - { id: 0, class: fr32, preferred-register: '' }
32  - { id: 1, class: fr32, preferred-register: '' }
33  - { id: 2, class: fr32, preferred-register: '' }
34liveins:
35  - { reg: '$xmm0', virtual-reg: '%0' }
36frameInfo:
37  isFrameAddressTaken: false
38  isReturnAddressTaken: false
39  hasStackMap:     false
40  hasPatchPoint:   false
41  stackSize:       0
42  offsetAdjustment: 0
43  maxAlignment:    1
44  adjustsStack:    false
45  hasCalls:        false
46  stackProtector:  ''
47  functionContext: ''
48  maxCallFrameSize: 4294967295
49  cvBytesOfCalleeSavedRegisters: 0
50  hasOpaqueSPAdjustment: false
51  hasVAStart:      false
52  hasMustTailInVarArgFunc: false
53  hasTailCall:     false
54  localFrameSize:  0
55  savePoint:       ''
56  restorePoint:    ''
57fixedStack:      []
58stack:           []
59callSites:       []
60debugValueSubstitutions: []
61constants:
62  - id:              0
63    value:           'float 1.000000e+00'
64    alignment:       4
65    isTargetSpecific: false
66machineFunctionInfo: {}
67body:             |
68  bb.0 (%ir-block.0):
69    liveins: $xmm0
70
71    ; CHECK-LABEL: name: check_MI_flags
72    ; CHECK: liveins: $xmm0
73    ; CHECK-NEXT: {{  $}}
74    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
75    ; CHECK-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
76    ; CHECK-NEXT: [[DIVSSrr:%[0-9]+]]:fr32 = nsz nofpexcept DIVSSrr [[MOVSSrm_alt]], [[COPY]], implicit $mxcsr
77    ; CHECK-NEXT: $xmm0 = COPY [[DIVSSrr]]
78    ; CHECK-NEXT: RET 0, $xmm0
79    %0:fr32 = COPY $xmm0
80    %1:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
81    %2:fr32 = nsz nofpexcept DIVSSrr %1, %0, implicit $mxcsr
82    $xmm0 = COPY %2
83    RET 0, $xmm0
84
85...
86
87
88
89