1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64 -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=PIC 3; RUN: llc -mtriple=x86_64-windows -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=WIN 4 5define i64 @i64_test(i64 %i) nounwind readnone { 6; PIC-LABEL: i64_test: 7; PIC: SelectionDAG has 12 nodes: 8; PIC-NEXT: t0: ch,glue = EntryToken 9; PIC-NEXT: t2: i64,ch = CopyFromReg t0, Register:i64 %0 10; PIC-NEXT: t7: i64,i32,ch = ADD64rm<Mem:(dereferenceable load (s64) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 11; PIC-NEXT: t10: ch,glue = CopyToReg t0, Register:i64 $rax, t7 12; PIC-NEXT: t11: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t10, t10:1 13; PIC-EMPTY: 14; 15; WIN-LABEL: i64_test: 16; WIN: SelectionDAG has 12 nodes: 17; WIN-NEXT: t0: ch,glue = EntryToken 18; WIN-NEXT: t2: i64,ch = CopyFromReg t0, Register:i64 %0 19; WIN-NEXT: t7: i64,i32,ch = ADD64rm<Mem:(dereferenceable load (s64) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 20; WIN-NEXT: t10: ch,glue = CopyToReg t0, Register:i64 $rax, t7 21; WIN-NEXT: t11: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t10, t10:1 22; WIN-EMPTY: 23 %loc = alloca i64 24 %j = load i64, i64 * %loc 25 %r = add i64 %i, %j 26 ret i64 %r 27} 28 29define i64 @i32_test(i32 %i) nounwind readnone { 30; PIC-LABEL: i32_test: 31; PIC: SelectionDAG has 15 nodes: 32; PIC-NEXT: t0: ch,glue = EntryToken 33; PIC-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %0 34; PIC-NEXT: t7: i32,i32,ch = ADD32rm<Mem:(dereferenceable load (s32) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 35; PIC-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t7, TargetConstant:i32<6> 36; PIC-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 37; PIC-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 38; PIC-EMPTY: 39; 40; WIN-LABEL: i32_test: 41; WIN: SelectionDAG has 15 nodes: 42; WIN-NEXT: t0: ch,glue = EntryToken 43; WIN-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %0 44; WIN-NEXT: t7: i32,i32,ch = ADD32rm<Mem:(dereferenceable load (s32) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 45; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t7, TargetConstant:i32<6> 46; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 47; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 48; WIN-EMPTY: 49 %loc = alloca i32 50 %j = load i32, i32 * %loc 51 %r = add i32 %i, %j 52 %ext = zext i32 %r to i64 53 ret i64 %ext 54} 55 56define i64 @i16_test(i16 %i) nounwind readnone { 57; PIC-LABEL: i16_test: 58; PIC: SelectionDAG has 18 nodes: 59; PIC-NEXT: t0: ch,glue = EntryToken 60; PIC-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %0 61; PIC-NEXT: t3: i16 = EXTRACT_SUBREG t2, TargetConstant:i32<4> 62; PIC-NEXT: t8: i16,i32,ch = ADD16rm<Mem:(dereferenceable load (s16) from %ir.loc)> t3, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 63; PIC-NEXT: t15: i32 = MOVZX32rr16 t8 64; PIC-NEXT: t9: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t15, TargetConstant:i32<6> 65; PIC-NEXT: t12: ch,glue = CopyToReg t0, Register:i64 $rax, t9 66; PIC-NEXT: t13: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t12, t12:1 67; PIC-EMPTY: 68; 69; WIN-LABEL: i16_test: 70; WIN: SelectionDAG has 16 nodes: 71; WIN-NEXT: t0: ch,glue = EntryToken 72; WIN-NEXT: t2: i16,ch = CopyFromReg t0, Register:i16 %0 73; WIN-NEXT: t7: i16,i32,ch = ADD16rm<Mem:(dereferenceable load (s16) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 74; WIN-NEXT: t14: i32 = MOVZX32rr16 t7 75; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t14, TargetConstant:i32<6> 76; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 77; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 78; WIN-EMPTY: 79 %loc = alloca i16 80 %j = load i16, i16 * %loc 81 %r = add i16 %i, %j 82 %ext = zext i16 %r to i64 83 ret i64 %ext 84} 85 86define i64 @i8_test(i8 %i) nounwind readnone { 87; PIC-LABEL: i8_test: 88; PIC: SelectionDAG has 18 nodes: 89; PIC-NEXT: t0: ch,glue = EntryToken 90; PIC-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %0 91; PIC-NEXT: t3: i8 = EXTRACT_SUBREG t2, TargetConstant:i32<1> 92; PIC-NEXT: t8: i8,i32,ch = ADD8rm<Mem:(dereferenceable load (s8) from %ir.loc)> t3, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 93; PIC-NEXT: t15: i32 = MOVZX32rr8 t8 94; PIC-NEXT: t9: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t15, TargetConstant:i32<6> 95; PIC-NEXT: t12: ch,glue = CopyToReg t0, Register:i64 $rax, t9 96; PIC-NEXT: t13: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t12, t12:1 97; PIC-EMPTY: 98; 99; WIN-LABEL: i8_test: 100; WIN: SelectionDAG has 16 nodes: 101; WIN-NEXT: t0: ch,glue = EntryToken 102; WIN-NEXT: t2: i8,ch = CopyFromReg t0, Register:i8 %0 103; WIN-NEXT: t7: i8,i32,ch = ADD8rm<Mem:(dereferenceable load (s8) from %ir.loc)> t2, TargetFrameIndex:i64<0>, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0 104; WIN-NEXT: t14: i32 = MOVZX32rr8 t7 105; WIN-NEXT: t8: i64 = SUBREG_TO_REG TargetConstant:i64<0>, t14, TargetConstant:i32<6> 106; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 107; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 108; WIN-EMPTY: 109 %loc = alloca i8 110 %j = load i8, i8 * %loc 111 %r = add i8 %i, %j 112 %ext = zext i8 %r to i64 113 ret i64 %ext 114} 115