1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -enable-machine-outliner -mtriple=s390x-unknown-linux < %s | FileCheck %s
3
4; NOTE: Machine outliner doesn't run.
5@x = dso_local global i32 0, align 4
6
7define dso_local i32 @check_boundaries() #0 {
8; CHECK-LABEL: check_boundaries:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    stmg %r11, %r15, 88(%r15)
11; CHECK-NEXT:    .cfi_offset %r11, -72
12; CHECK-NEXT:    .cfi_offset %r15, -40
13; CHECK-NEXT:    aghi %r15, -184
14; CHECK-NEXT:    .cfi_def_cfa_offset 344
15; CHECK-NEXT:    lgr %r11, %r15
16; CHECK-NEXT:    .cfi_def_cfa_register %r11
17; CHECK-NEXT:    mvhi 180(%r11), 0
18; CHECK-NEXT:    lhi %r0, 0
19; CHECK-NEXT:    mvhi 168(%r11), 0
20; CHECK-NEXT:    cije %r0, 0, .LBB0_3
21; CHECK-NEXT:  # %bb.1:
22; CHECK-NEXT:    mvhi 164(%r11), 1
23; CHECK-NEXT:    chsi 168(%r11), 0
24; CHECK-NEXT:    je .LBB0_4
25; CHECK-NEXT:  .LBB0_2:
26; CHECK-NEXT:    mvhi 164(%r11), 1
27; CHECK-NEXT:    j .LBB0_5
28; CHECK-NEXT:  .LBB0_3:
29; CHECK-NEXT:    mvhi 168(%r11), 1
30; CHECK-NEXT:    mvhi 176(%r11), 2
31; CHECK-NEXT:    mvhi 164(%r11), 3
32; CHECK-NEXT:    mvhi 172(%r11), 4
33; CHECK-NEXT:    chsi 168(%r11), 0
34; CHECK-NEXT:    jlh .LBB0_2
35; CHECK-NEXT:  .LBB0_4:
36; CHECK-NEXT:    mvhi 168(%r11), 1
37; CHECK-NEXT:    mvhi 176(%r11), 2
38; CHECK-NEXT:    mvhi 164(%r11), 3
39; CHECK-NEXT:    mvhi 172(%r11), 4
40; CHECK-NEXT:  .LBB0_5:
41; CHECK-NEXT:    lhi %r2, 0
42; CHECK-NEXT:    lmg %r11, %r15, 272(%r11)
43; CHECK-NEXT:    br %r14
44  %1 = alloca i32, align 4
45  %2 = alloca i32, align 4
46  %3 = alloca i32, align 4
47  %4 = alloca i32, align 4
48  %5 = alloca i32, align 4
49  store i32 0, i32* %1, align 4
50  store i32 0, i32* %2, align 4
51  %6 = load i32, i32* %2, align 4
52  %7 = icmp ne i32 %6, 0
53  br i1 %7, label %9, label %8
54
55  store i32 1, i32* %2, align 4
56  store i32 2, i32* %3, align 4
57  store i32 3, i32* %4, align 4
58  store i32 4, i32* %5, align 4
59  br label %10
60
61  store i32 1, i32* %4, align 4
62  br label %10
63
64  %11 = load i32, i32* %2, align 4
65  %12 = icmp ne i32 %11, 0
66  br i1 %12, label %14, label %13
67
68  store i32 1, i32* %2, align 4
69  store i32 2, i32* %3, align 4
70  store i32 3, i32* %4, align 4
71  store i32 4, i32* %5, align 4
72  br label %15
73
74  store i32 1, i32* %4, align 4
75  br label %15
76
77  ret i32 0
78}
79
80define dso_local i32 @main() #0 {
81; CHECK-LABEL: main:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    stmg %r11, %r15, 88(%r15)
84; CHECK-NEXT:    .cfi_offset %r11, -72
85; CHECK-NEXT:    .cfi_offset %r15, -40
86; CHECK-NEXT:    aghi %r15, -184
87; CHECK-NEXT:    .cfi_def_cfa_offset 344
88; CHECK-NEXT:    lgr %r11, %r15
89; CHECK-NEXT:    .cfi_def_cfa_register %r11
90; CHECK-NEXT:    mvhi 180(%r11), 0
91; CHECK-NEXT:    mvhi 176(%r11), 1
92; CHECK-NEXT:    mvhi 172(%r11), 2
93; CHECK-NEXT:    mvhi 168(%r11), 3
94; CHECK-NEXT:    mvhi 164(%r11), 4
95; CHECK-NEXT:    lhi %r0, 1
96; CHECK-NEXT:    strl %r0, x
97; CHECK-NEXT:    #APP
98; CHECK-NEXT:    #NO_APP
99; CHECK-NEXT:    mvhi 176(%r11), 1
100; CHECK-NEXT:    mvhi 172(%r11), 2
101; CHECK-NEXT:    mvhi 168(%r11), 3
102; CHECK-NEXT:    lhi %r2, 0
103; CHECK-NEXT:    mvhi 164(%r11), 4
104; CHECK-NEXT:    lmg %r11, %r15, 272(%r11)
105; CHECK-NEXT:    br %r14
106  %1 = alloca i32, align 4
107  %2 = alloca i32, align 4
108  %3 = alloca i32, align 4
109  %4 = alloca i32, align 4
110  %5 = alloca i32, align 4
111
112  store i32 0, i32* %1, align 4
113  store i32 0, i32* @x, align 4
114  store i32 1, i32* %2, align 4
115  store i32 2, i32* %3, align 4
116  store i32 3, i32* %4, align 4
117  store i32 4, i32* %5, align 4
118  store i32 1, i32* @x, align 4
119  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
120  store i32 1, i32* %2, align 4
121  store i32 2, i32* %3, align 4
122  store i32 3, i32* %4, align 4
123  store i32 4, i32* %5, align 4
124  ret i32 0
125}
126
127attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
128