1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -enable-machine-outliner -mtriple=msp430-unknown-linux < %s | FileCheck %s
3
4; NOTE: Machine outliner doesn't run.
5@x = global i32 0, align 4
6
7define dso_local i32 @check_boundaries() #0 {
8; CHECK-LABEL: check_boundaries:
9; CHECK:         .cfi_startproc
10; CHECK-NEXT:  ; %bb.0:
11; CHECK-NEXT:    push r4
12; CHECK-NEXT:    .cfi_def_cfa_offset 4
13; CHECK-NEXT:    .cfi_offset r4, -4
14; CHECK-NEXT:    mov r1, r4
15; CHECK-NEXT:    .cfi_def_cfa_register r4
16; CHECK-NEXT:    sub #20, r1
17; CHECK-NEXT:    clr -6(r4)
18; CHECK-NEXT:    clr -8(r4)
19; CHECK-NEXT:    clr -2(r4)
20; CHECK-NEXT:    clr -4(r4)
21; CHECK-NEXT:    clr r12
22; CHECK-NEXT:    tst r12
23; CHECK-NEXT:    jeq .LBB0_2
24; CHECK-NEXT:  ; %bb.1:
25; CHECK-NEXT:    clr -14(r4)
26; CHECK-NEXT:    mov #1, -16(r4)
27; CHECK-NEXT:    jmp .LBB0_3
28; CHECK-NEXT:  .LBB0_2:
29; CHECK-NEXT:    clr -10(r4)
30; CHECK-NEXT:    mov #2, -12(r4)
31; CHECK-NEXT:    clr -6(r4)
32; CHECK-NEXT:    mov #1, -8(r4)
33; CHECK-NEXT:    clr -14(r4)
34; CHECK-NEXT:    mov #3, -16(r4)
35; CHECK-NEXT:    clr -18(r4)
36; CHECK-NEXT:    mov #4, -20(r4)
37; CHECK-NEXT:  .LBB0_3:
38; CHECK-NEXT:    mov -8(r4), r12
39; CHECK-NEXT:    bis -6(r4), r12
40; CHECK-NEXT:    tst r12
41; CHECK-NEXT:    jeq .LBB0_5
42; CHECK-NEXT:  ; %bb.4:
43; CHECK-NEXT:    clr -14(r4)
44; CHECK-NEXT:    mov #1, -16(r4)
45; CHECK-NEXT:    jmp .LBB0_6
46; CHECK-NEXT:  .LBB0_5:
47; CHECK-NEXT:    clr -10(r4)
48; CHECK-NEXT:    mov #2, -12(r4)
49; CHECK-NEXT:    clr -6(r4)
50; CHECK-NEXT:    mov #1, -8(r4)
51; CHECK-NEXT:    clr -14(r4)
52; CHECK-NEXT:    mov #3, -16(r4)
53; CHECK-NEXT:    clr -18(r4)
54; CHECK-NEXT:    mov #4, -20(r4)
55; CHECK-NEXT:  .LBB0_6:
56; CHECK-NEXT:    clr r12
57; CHECK-NEXT:    clr r13
58; CHECK-NEXT:    add #20, r1
59; CHECK-NEXT:    pop r4
60; CHECK-NEXT:    .cfi_def_cfa r1, 2
61; CHECK-NEXT:    ret
62  %1 = alloca i32, align 4
63  %2 = alloca i32, align 4
64  %3 = alloca i32, align 4
65  %4 = alloca i32, align 4
66  %5 = alloca i32, align 4
67  store i32 0, i32* %1, align 4
68  store i32 0, i32* %2, align 4
69  %6 = load i32, i32* %2, align 4
70  %7 = icmp ne i32 %6, 0
71  br i1 %7, label %9, label %8
72
73  store i32 1, i32* %2, align 4
74  store i32 2, i32* %3, align 4
75  store i32 3, i32* %4, align 4
76  store i32 4, i32* %5, align 4
77  br label %10
78
79  store i32 1, i32* %4, align 4
80  br label %10
81
82  %11 = load i32, i32* %2, align 4
83  %12 = icmp ne i32 %11, 0
84  br i1 %12, label %14, label %13
85
86  store i32 1, i32* %2, align 4
87  store i32 2, i32* %3, align 4
88  store i32 3, i32* %4, align 4
89  store i32 4, i32* %5, align 4
90  br label %15
91
92  store i32 1, i32* %4, align 4
93  br label %15
94
95  ret i32 0
96}
97
98define dso_local i32 @main() #0 {
99; CHECK-LABEL: main:
100; CHECK:         .cfi_startproc
101; CHECK-NEXT:  ; %bb.0:
102; CHECK-NEXT:    push r4
103; CHECK-NEXT:    .cfi_def_cfa_offset 4
104; CHECK-NEXT:    .cfi_offset r4, -4
105; CHECK-NEXT:    mov r1, r4
106; CHECK-NEXT:    .cfi_def_cfa_register r4
107; CHECK-NEXT:    sub #20, r1
108; CHECK-NEXT:    clr &x+2
109; CHECK-NEXT:    mov #1, &x
110; CHECK-NEXT:    clr -2(r4)
111; CHECK-NEXT:    clr -4(r4)
112; CHECK-NEXT:    clr -6(r4)
113; CHECK-NEXT:    mov #1, -8(r4)
114; CHECK-NEXT:    clr -10(r4)
115; CHECK-NEXT:    mov #2, -12(r4)
116; CHECK-NEXT:    clr -14(r4)
117; CHECK-NEXT:    mov #3, -16(r4)
118; CHECK-NEXT:    clr -18(r4)
119; CHECK-NEXT:    mov #4, -20(r4)
120; CHECK-NEXT:    ;APP
121; CHECK-NEXT:    ;NO_APP
122; CHECK-NEXT:    clr -10(r4)
123; CHECK-NEXT:    mov #2, -12(r4)
124; CHECK-NEXT:    clr -6(r4)
125; CHECK-NEXT:    mov #1, -8(r4)
126; CHECK-NEXT:    clr -14(r4)
127; CHECK-NEXT:    mov #3, -16(r4)
128; CHECK-NEXT:    clr -18(r4)
129; CHECK-NEXT:    mov #4, -20(r4)
130; CHECK-NEXT:    clr r12
131; CHECK-NEXT:    clr r13
132; CHECK-NEXT:    add #20, r1
133; CHECK-NEXT:    pop r4
134; CHECK-NEXT:    .cfi_def_cfa r1, 2
135; CHECK-NEXT:    ret
136  %1 = alloca i32, align 4
137  %2 = alloca i32, align 4
138  %3 = alloca i32, align 4
139  %4 = alloca i32, align 4
140  %5 = alloca i32, align 4
141
142  store i32 0, i32* %1, align 4
143  store i32 0, i32* @x, align 4
144  store i32 1, i32* %2, align 4
145  store i32 2, i32* %3, align 4
146  store i32 3, i32* %4, align 4
147  store i32 4, i32* %5, align 4
148  store i32 1, i32* @x, align 4
149  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
150  store i32 1, i32* %2, align 4
151  store i32 2, i32* %3, align 4
152  store i32 3, i32* %4, align 4
153  store i32 4, i32* %5, align 4
154  ret i32 0
155}
156
157attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
158