xref: /llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_asm.ll.expected (revision 8565b6f9f2782b8b6757fe078c4de01b61ef9ea8)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=lanai < %s | FileCheck %s
3
4define i64 @i64_test(i64 %i) nounwind readnone {
5; CHECK-LABEL: i64_test:
6; CHECK:       ! %bb.0:
7; CHECK-NEXT:    st %fp, [--%sp]
8; CHECK-NEXT:    add %sp, 0x8, %fp
9; CHECK-NEXT:    sub %sp, 0x10, %sp
10; CHECK-NEXT:    ld 4[%fp], %r3
11; CHECK-NEXT:    ld 0[%fp], %r9
12; CHECK-NEXT:    sub %fp, 0x10, %r12
13; CHECK-NEXT:    or %r12, 0x4, %r12
14; CHECK-NEXT:    ld -16[%fp], %r13
15; CHECK-NEXT:    ld 0[%r12], %r12
16; CHECK-NEXT:    add %r9, %r13, %r13
17; CHECK-NEXT:    add %r3, %r12, %r9
18; CHECK-NEXT:    sub.f %r9, %r3, %r0
19; CHECK-NEXT:    sult %r3
20; CHECK-NEXT:    add %r13, %r3, %rv
21; CHECK-NEXT:    ld -4[%fp], %pc ! return
22; CHECK-NEXT:    add %fp, 0x0, %sp
23; CHECK-NEXT:    ld -8[%fp], %fp
24  %loc = alloca i64
25  %j = load i64, i64 * %loc
26  %r = add i64 %i, %j
27  ret i64 %r
28}
29
30define i64 @i32_test(i32 %i) nounwind readnone {
31; CHECK-LABEL: i32_test:
32; CHECK:       ! %bb.0:
33; CHECK-NEXT:    st %fp, [--%sp]
34; CHECK-NEXT:    add %sp, 0x8, %fp
35; CHECK-NEXT:    sub %sp, 0x10, %sp
36; CHECK-NEXT:    ld 0[%fp], %r3
37; CHECK-NEXT:    ld -12[%fp], %r9
38; CHECK-NEXT:    add %r3, %r9, %r9
39; CHECK-NEXT:    or %r0, 0x0, %rv
40; CHECK-NEXT:    ld -4[%fp], %pc ! return
41; CHECK-NEXT:    add %fp, 0x0, %sp
42; CHECK-NEXT:    ld -8[%fp], %fp
43  %loc = alloca i32
44  %j = load i32, i32 * %loc
45  %r = add i32 %i, %j
46  %ext = zext i32 %r to i64
47  ret i64 %ext
48}
49
50define i64 @i16_test(i16 %i) nounwind readnone {
51; CHECK-LABEL: i16_test:
52; CHECK:       ! %bb.0:
53; CHECK-NEXT:    st %fp, [--%sp]
54; CHECK-NEXT:    add %sp, 0x8, %fp
55; CHECK-NEXT:    sub %sp, 0x10, %sp
56; CHECK-NEXT:    add %fp, 0x0, %r3
57; CHECK-NEXT:    or %r3, 0x2, %r3
58; CHECK-NEXT:    uld.h 0[%r3], %r3
59; CHECK-NEXT:    uld.h -10[%fp], %r9
60; CHECK-NEXT:    add %r3, %r9, %r3
61; CHECK-NEXT:    and %r3, 0xffff, %r9
62; CHECK-NEXT:    or %r0, 0x0, %rv
63; CHECK-NEXT:    ld -4[%fp], %pc ! return
64; CHECK-NEXT:    add %fp, 0x0, %sp
65; CHECK-NEXT:    ld -8[%fp], %fp
66  %loc = alloca i16
67  %j = load i16, i16 * %loc
68  %r = add i16 %i, %j
69  %ext = zext i16 %r to i64
70  ret i64 %ext
71}
72
73define i64 @i8_test(i8 %i) nounwind readnone {
74; CHECK-LABEL: i8_test:
75; CHECK:       ! %bb.0:
76; CHECK-NEXT:    st %fp, [--%sp]
77; CHECK-NEXT:    add %sp, 0x8, %fp
78; CHECK-NEXT:    sub %sp, 0x10, %sp
79; CHECK-NEXT:    add %fp, 0x0, %r3
80; CHECK-NEXT:    or %r3, 0x3, %r3
81; CHECK-NEXT:    uld.b 0[%r3], %r3
82; CHECK-NEXT:    uld.b -9[%fp], %r9
83; CHECK-NEXT:    add %r3, %r9, %r3
84; CHECK-NEXT:    mov 0xff, %r9
85; CHECK-NEXT:    and %r3, %r9, %r9
86; CHECK-NEXT:    or %r0, 0x0, %rv
87; CHECK-NEXT:    ld -4[%fp], %pc ! return
88; CHECK-NEXT:    add %fp, 0x0, %sp
89; CHECK-NEXT:    ld -8[%fp], %fp
90  %loc = alloca i8
91  %j = load i8, i8 * %loc
92  %r = add i8 %i, %j
93  %ext = zext i8 %r to i64
94  ret i64 %ext
95}
96