1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s 3 4define i64 @i64_test(i64 %i) nounwind readnone { 5; CHECK-LABEL: i64_test: 6; CHECK: ; %bb.0: 7; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 9; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:4 10; CHECK-NEXT: s_waitcnt vmcnt(1) 11; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 12; CHECK-NEXT: s_waitcnt vmcnt(0) 13; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc 14; CHECK-NEXT: s_setpc_b64 s[30:31] 15 %loc = alloca i64, addrspace(5) 16 %j = load i64, ptr addrspace(5) %loc 17 %r = add i64 %i, %j 18 ret i64 %r 19} 20 21define i64 @i32_test(i32 %i) nounwind readnone { 22; CHECK-LABEL: i32_test: 23; CHECK: ; %bb.0: 24; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 25; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 26; CHECK-NEXT: s_waitcnt vmcnt(0) 27; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 28; CHECK-NEXT: v_mov_b32_e32 v1, 0 29; CHECK-NEXT: s_setpc_b64 s[30:31] 30 %loc = alloca i32, addrspace(5) 31 %j = load i32, ptr addrspace(5) %loc 32 %r = add i32 %i, %j 33 %ext = zext i32 %r to i64 34 ret i64 %ext 35} 36 37define i64 @i16_test(i16 %i) nounwind readnone { 38; CHECK-LABEL: i16_test: 39; CHECK: ; %bb.0: 40; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 41; CHECK-NEXT: buffer_load_ushort v1, off, s[0:3], s32 42; CHECK-NEXT: s_waitcnt vmcnt(0) 43; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 44; CHECK-NEXT: v_and_b32_e32 v0, 0xffff, v0 45; CHECK-NEXT: v_mov_b32_e32 v1, 0 46; CHECK-NEXT: s_setpc_b64 s[30:31] 47 %loc = alloca i16, addrspace(5) 48 %j = load i16, ptr addrspace(5) %loc 49 %r = add i16 %i, %j 50 %ext = zext i16 %r to i64 51 ret i64 %ext 52} 53 54define i64 @i8_test(i8 %i) nounwind readnone { 55; CHECK-LABEL: i8_test: 56; CHECK: ; %bb.0: 57; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 58; CHECK-NEXT: buffer_load_ubyte v1, off, s[0:3], s32 59; CHECK-NEXT: s_waitcnt vmcnt(0) 60; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 61; CHECK-NEXT: v_and_b32_e32 v0, 0xff, v0 62; CHECK-NEXT: v_mov_b32_e32 v1, 0 63; CHECK-NEXT: s_setpc_b64 s[30:31] 64 %loc = alloca i8, addrspace(5) 65 %j = load i8, ptr addrspace(5) %loc 66 %r = add i8 %i, %j 67 %ext = zext i8 %r to i64 68 ret i64 %ext 69} 70