xref: /llvm-project/llvm/test/Verifier/intrinsic-arg-overloading-struct-ret.ll (revision c820f2a43eaba02db97c4ff60c58a58e6bdd391d) 
1; RUN: not opt -passes=verify -S < %s 2>&1 | FileCheck %s
2
3; LD2 and LD2LANE
4
5; CHECK: Intrinsic has incorrect return type
6; CHECK-NEXT: llvm.aarch64.neon.ld2.v4i32
7define { <4 x i64>, <4 x i32> } @test_ld2_ret(ptr %ptr) {
8  %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)
9  ret{ <4 x i64>, <4 x i32> } %res
10}
11declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)
12
13; CHECK: Intrinsic has incorrect return type
14; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i64
15define { <4 x i64>, <4 x i32> } @test_ld2lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b) {
16  %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64> %a, <4 x i64> %b, i64 0, ptr %ptr)
17  ret{ <4 x i64>, <4 x i32> } %res
18}
19declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64>, <4 x i64>, i64, ptr)
20
21; CHECK: Intrinsic has incorrect argument type
22; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i32
23define { <4 x i32>, <4 x i32> } @test_ld2lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b) {
24  %res = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64> %a, <4 x i32> %b, i64 0, ptr %ptr)
25  ret{ <4 x i32>, <4 x i32> } %res
26}
27declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64>, <4 x i32>, i64, ptr)
28
29; LD3 and LD3LANE
30
31; CHECK: Intrinsic has incorrect return type
32; CHECK-NEXT: llvm.aarch64.neon.ld3.v4i32
33define { <4 x i32>, <4 x i64>, <4 x i32> } @test_ld3_ret(ptr %ptr) {
34  %res = call { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)
35  ret{ <4 x i32>, <4 x i64>, <4 x i32> } %res
36}
37declare { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)
38
39; CHECK: Intrinsic has incorrect return type
40; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i64
41define { <4 x i64>, <4 x i32>, <4 x i64> } @test_ld3lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c) {
42  %res = call { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, i64 0, ptr %ptr)
43  ret{ <4 x i64>, <4 x i32>, <4 x i64> } %res
44}
45declare { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)
46
47; CHECK: Intrinsic has incorrect argument type
48; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i32
49define { <4 x i32>, <4 x i32>, <4 x i32> } @test_ld3lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c) {
50  %res = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, i64 0, ptr %ptr)
51  ret{ <4 x i32>, <4 x i32>, <4 x i32> } %res
52}
53declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, i64, ptr)
54
55; LD4 and LD4LANE
56
57; CHECK: Intrinsic has incorrect return type
58; CHECK-NEXT: llvm.aarch64.neon.ld4.v4i32
59define { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @test_ld4_ret(ptr %ptr) {
60  %res = call { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)
61  ret{ <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } %res
62}
63declare { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)
64
65; CHECK: Intrinsic has incorrect return type
66; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i64
67define { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @test_ld4lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {
68  %res = call { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d, i64 0, ptr %ptr)
69  ret{ <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } %res
70}
71declare { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)
72
73; CHECK: Intrinsic has incorrect argument type
74; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i32
75define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_ld4lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
76  %res = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, i64 0, ptr %ptr)
77  ret{ <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %res
78}
79declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, <4 x i32>, i64, ptr)
80