xref: /llvm-project/llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll (revision 8979ae42769e529b0f6fce3268492ffb49bd54b9)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
3; PR2967
4
5target datalayout =
6"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32"
7target triple = "i386-pc-linux-gnu"
8
9define void @test1(i32 %x) nounwind {
10; CHECK-LABEL: @test1(
11; CHECK-NEXT:  entry:
12; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
13; CHECK-NEXT:    [[TMP1:%.*]] = xor i1 [[TMP0]], true
14; CHECK-NEXT:    call void @llvm.assume(i1 [[TMP1]])
15; CHECK-NEXT:    ret void
16;
17entry:
18  %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
19  br i1 %0, label %bb, label %return
20
21bb:             ; preds = %entry
22  %1 = load volatile i32, ptr null
23  unreachable
24
25  br label %return
26return:         ; preds = %entry
27  ret void
28}
29
30define void @test1_no_null_opt(i32 %x) nounwind #0 {
31; CHECK-LABEL: @test1_no_null_opt(
32; CHECK-NEXT:  entry:
33; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
34; CHECK-NEXT:    [[TMP1:%.*]] = xor i1 [[TMP0]], true
35; CHECK-NEXT:    call void @llvm.assume(i1 [[TMP1]])
36; CHECK-NEXT:    ret void
37;
38entry:
39  %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
40  br i1 %0, label %bb, label %return
41
42bb:             ; preds = %entry
43  %1 = load volatile i32, ptr null
44  unreachable
45
46  br label %return
47return:         ; preds = %entry
48  ret void
49}
50
51; rdar://7958343
52define void @test2() nounwind {
53; CHECK-LABEL: @test2(
54; CHECK-NEXT:  entry:
55; CHECK-NEXT:    unreachable
56;
57entry:
58  store i32 4,ptr null
59  ret void
60
61}
62
63define void @test2_no_null_opt() nounwind #0 {
64; CHECK-LABEL: @test2_no_null_opt(
65; CHECK-NEXT:  entry:
66; CHECK-NEXT:    store i32 4, ptr null, align 4
67; CHECK-NEXT:    ret void
68;
69entry:
70  store i32 4,ptr null
71  ret void
72}
73
74; PR7369
75define void @test3() nounwind {
76; CHECK-LABEL: @test3(
77; CHECK-NEXT:  entry:
78; CHECK-NEXT:    store volatile i32 4, ptr null, align 4
79; CHECK-NEXT:    ret void
80;
81entry:
82  store volatile i32 4, ptr null
83  ret void
84
85}
86
87define void @test3_no_null_opt() nounwind #0 {
88; CHECK-LABEL: @test3_no_null_opt(
89; CHECK-NEXT:  entry:
90; CHECK-NEXT:    store volatile i32 4, ptr null, align 4
91; CHECK-NEXT:    ret void
92;
93entry:
94  store volatile i32 4, ptr null
95  ret void
96
97}
98
99; Check store before unreachable.
100define void @test4(i1 %C, ptr %P) {
101; CHECK-LABEL: @test4(
102; CHECK-NEXT:  entry:
103; CHECK-NEXT:    br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
104; CHECK:       T:
105; CHECK-NEXT:    store volatile i32 0, ptr [[P:%.*]], align 4
106; CHECK-NEXT:    unreachable
107; CHECK:       F:
108; CHECK-NEXT:    ret void
109;
110entry:
111  br i1 %C, label %T, label %F
112T:
113  store volatile i32 0, ptr %P
114  unreachable
115F:
116  ret void
117}
118
119; Check cmpxchg before unreachable.
120define void @test5(i1 %C, ptr %P) {
121; CHECK-LABEL: @test5(
122; CHECK-NEXT:  entry:
123; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[C:%.*]], true
124; CHECK-NEXT:    call void @llvm.assume(i1 [[TMP0]])
125; CHECK-NEXT:    ret void
126;
127entry:
128  br i1 %C, label %T, label %F
129T:
130  cmpxchg volatile ptr %P, i32 0, i32 1 seq_cst seq_cst
131  unreachable
132F:
133  ret void
134}
135
136; Check atomicrmw before unreachable.
137define void @test6(i1 %C, ptr %P) {
138; CHECK-LABEL: @test6(
139; CHECK-NEXT:  entry:
140; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[C:%.*]], true
141; CHECK-NEXT:    call void @llvm.assume(i1 [[TMP0]])
142; CHECK-NEXT:    ret void
143;
144entry:
145  br i1 %C, label %T, label %F
146T:
147  atomicrmw volatile xchg ptr %P, i32 0 seq_cst
148  unreachable
149F:
150  ret void
151}
152
153attributes #0 = { null_pointer_is_valid }
154