xref: /llvm-project/llvm/test/Transforms/SimplifyCFG/pr48641.ll (revision 8979ae42769e529b0f6fce3268492ffb49bd54b9)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
3
4define i32 @foo_add(ptr %arg, i32 %arg1, i32 %arg2) {
5; CHECK-LABEL: @foo_add(
6; CHECK-NEXT:  common.ret:
7; CHECK-NEXT:    [[I:%.*]] = sext i32 [[ARG1:%.*]] to i64
8; CHECK-NEXT:    [[I3:%.*]] = getelementptr inbounds i8, ptr [[ARG:%.*]], i64 [[I]]
9; CHECK-NEXT:    [[I4:%.*]] = load i8, ptr [[I3]], align 1
10; CHECK-NEXT:    [[I5:%.*]] = zext i8 [[I4]] to i32
11; CHECK-NEXT:    [[I6:%.*]] = add nsw i32 [[I5]], [[ARG2:%.*]]
12; CHECK-NEXT:    [[I7:%.*]] = icmp sgt i32 [[I6]], 255
13; CHECK-NEXT:    [[I9:%.*]] = icmp sgt i32 [[I6]], 0
14; CHECK-NEXT:    [[I10:%.*]] = select i1 [[I9]], i32 [[I6]], i32 0
15; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = select i1 [[I7]], i32 255, i32 [[I10]]
16; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
17;
18  %i = sext i32 %arg1 to i64
19  %i3 = getelementptr inbounds i8, ptr %arg, i64 %i
20  %i4 = load i8, ptr %i3, align 1
21  %i5 = zext i8 %i4 to i32
22  %i6 = add nsw i32 %i5, %arg2
23  %i7 = icmp sgt i32 %i6, 255
24  br i1 %i7, label %bb11, label %bb8
25
26bb8:
27  %i9 = icmp sgt i32 %i6, 0
28  %i10 = select i1 %i9, i32 %i6, i32 0
29  ret i32 %i10
30
31bb11:
32  ret i32 255
33}
34