xref: /llvm-project/llvm/test/Transforms/SimplifyCFG/hoist-common-skip-limit.ll (revision 078899cd64cd2fb787c2c5356e16dd818ee3ad23)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S --passes='simplifycfg<hoist-common-insts>' -simplifycfg-hoist-common-skip-limit=0 %s | FileCheck %s --check-prefix=LIMIT0
3; RUN: opt -S --passes='simplifycfg<hoist-common-insts>' -simplifycfg-hoist-common-skip-limit=1 %s | FileCheck %s --check-prefix=LIMIT1
4; RUN: opt -S --passes='simplifycfg<hoist-common-insts>' -simplifycfg-hoist-common-skip-limit=2 %s | FileCheck %s --check-prefix=LIMIT2
5
6define void @f(i1 %c, ptr nocapture noundef %d, ptr nocapture noundef readonly %m, ptr nocapture noundef readonly %b) {
7; LIMIT0-LABEL: @f(
8; LIMIT0-NEXT:  entry:
9; LIMIT0-NEXT:    [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
10; LIMIT0-NEXT:    br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
11; LIMIT0:       if.then:
12; LIMIT0-NEXT:    call void @no_side_effects0()
13; LIMIT0-NEXT:    [[ADD:%.*]] = add nsw i16 [[TMP0]], 1
14; LIMIT0-NEXT:    [[TMP1:%.*]] = load i16, ptr [[M:%.*]], align 2
15; LIMIT0-NEXT:    [[U:%.*]] = add i16 [[ADD]], [[TMP1]]
16; LIMIT0-NEXT:    br label [[IF_END:%.*]]
17; LIMIT0:       if.else:
18; LIMIT0-NEXT:    call void @no_side_effects1()
19; LIMIT0-NEXT:    [[SUB:%.*]] = sub nsw i16 [[TMP0]], 1
20; LIMIT0-NEXT:    [[TMP2:%.*]] = load i16, ptr [[M]], align 2
21; LIMIT0-NEXT:    [[V:%.*]] = add i16 [[SUB]], [[TMP2]]
22; LIMIT0-NEXT:    br label [[IF_END]]
23; LIMIT0:       if.end:
24; LIMIT0-NEXT:    [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
25; LIMIT0-NEXT:    store i16 [[UV]], ptr [[D:%.*]], align 2
26; LIMIT0-NEXT:    ret void
27;
28; LIMIT1-LABEL: @f(
29; LIMIT1-NEXT:  entry:
30; LIMIT1-NEXT:    [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
31; LIMIT1-NEXT:    br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
32; LIMIT1:       if.then:
33; LIMIT1-NEXT:    call void @no_side_effects0()
34; LIMIT1-NEXT:    [[ADD:%.*]] = add nsw i16 [[TMP0]], 1
35; LIMIT1-NEXT:    [[TMP1:%.*]] = load i16, ptr [[M:%.*]], align 2
36; LIMIT1-NEXT:    [[U:%.*]] = add i16 [[ADD]], [[TMP1]]
37; LIMIT1-NEXT:    br label [[IF_END:%.*]]
38; LIMIT1:       if.else:
39; LIMIT1-NEXT:    call void @no_side_effects1()
40; LIMIT1-NEXT:    [[SUB:%.*]] = sub nsw i16 [[TMP0]], 1
41; LIMIT1-NEXT:    [[TMP2:%.*]] = load i16, ptr [[M]], align 2
42; LIMIT1-NEXT:    [[V:%.*]] = add i16 [[SUB]], [[TMP2]]
43; LIMIT1-NEXT:    br label [[IF_END]]
44; LIMIT1:       if.end:
45; LIMIT1-NEXT:    [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
46; LIMIT1-NEXT:    store i16 [[UV]], ptr [[D:%.*]], align 2
47; LIMIT1-NEXT:    ret void
48;
49; LIMIT2-LABEL: @f(
50; LIMIT2-NEXT:  entry:
51; LIMIT2-NEXT:    [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
52; LIMIT2-NEXT:    [[TMP1:%.*]] = load i16, ptr [[M:%.*]], align 2
53; LIMIT2-NEXT:    br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
54; LIMIT2:       if.then:
55; LIMIT2-NEXT:    call void @no_side_effects0()
56; LIMIT2-NEXT:    [[ADD:%.*]] = add nsw i16 [[TMP0]], 1
57; LIMIT2-NEXT:    [[U:%.*]] = add i16 [[ADD]], [[TMP1]]
58; LIMIT2-NEXT:    br label [[IF_END:%.*]]
59; LIMIT2:       if.else:
60; LIMIT2-NEXT:    call void @no_side_effects1()
61; LIMIT2-NEXT:    [[SUB:%.*]] = sub nsw i16 [[TMP0]], 1
62; LIMIT2-NEXT:    [[V:%.*]] = add i16 [[SUB]], [[TMP1]]
63; LIMIT2-NEXT:    br label [[IF_END]]
64; LIMIT2:       if.end:
65; LIMIT2-NEXT:    [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
66; LIMIT2-NEXT:    store i16 [[UV]], ptr [[D:%.*]], align 2
67; LIMIT2-NEXT:    ret void
68;
69entry:
70  br i1 %c, label %if.then, label %if.else
71
72if.then:
73  %0 = load i16, ptr %b, align 2
74  call void @no_side_effects0()
75  %add = add nsw i16 %0, 1
76  %1 = load i16, ptr %m, align 2
77  %u = add i16 %add, %1
78  br label %if.end
79
80if.else:
81  %2 = load i16, ptr %b, align 2
82  call void @no_side_effects1()
83  %sub = sub nsw i16 %2, 1
84  %3 = load i16, ptr %m, align 2
85  %v = add i16 %sub, %3
86  br label %if.end
87
88if.end:
89  %uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
90  store i16 %uv, ptr %d, align 2
91  ret void
92}
93
94declare void @side_effects0()
95declare void @side_effects1()
96declare void @no_side_effects0() readonly nounwind willreturn
97declare void @no_side_effects1() readonly nounwind willreturn
98