xref: /llvm-project/llvm/test/Transforms/SimplifyCFG/X86/safe-low-bit-extract.ll (revision d1d129356909af2f6fefd6f1b9335a39fe172e9a)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
3
4; This is the naive implementation of x86 BZHI/BEXTR instruction:
5; it takes input and bit count, and extracts low nbits up to bit width.
6; I.e. unlike shift it does not have any UB when nbits >= bitwidth.
7; Which means we don't need a while PHI here, simple select will do.
8define i32 @extract_low_bits(i32 %input, i32 %nbits) {
9; CHECK-LABEL: @extract_low_bits(
10; CHECK-NEXT:  begin:
11; CHECK-NEXT:    [[SHOULD_MASK:%.*]] = icmp ult i32 [[NBITS:%.*]], 32
12; CHECK-NEXT:    [[MASK_NOT:%.*]] = shl nsw i32 -1, [[NBITS]]
13; CHECK-NEXT:    [[MASK:%.*]] = xor i32 [[MASK_NOT]], -1
14; CHECK-NEXT:    [[MASKED:%.*]] = and i32 [[MASK]], [[INPUT:%.*]]
15; CHECK-NEXT:    [[RES:%.*]] = select i1 [[SHOULD_MASK]], i32 [[MASKED]], i32 [[INPUT]]
16; CHECK-NEXT:    ret i32 [[RES]]
17;
18begin:
19  %should_mask = icmp ult i32 %nbits, 32
20  br i1 %should_mask, label %perform_masking, label %end
21
22perform_masking: ; preds = %begin
23  %mask.not = shl nsw i32 -1, %nbits
24  %mask = xor i32 %mask.not, -1
25  %masked = and i32 %mask, %input
26  br label %end
27
28end:             ; preds = %perform_masking, %begin
29  %res = phi i32 [ %masked, %perform_masking ], [ %input, %begin ]
30  ret i32 %res
31}
32