1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE,SSE2 3; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE,SSE4 4; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2 5; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512 6 7define zeroext i1 @cmp128(<2 x i64> %x, <2 x i64> %y) { 8; SSE2-LABEL: define zeroext i1 @cmp128( 9; SSE2-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { 10; SSE2-NEXT: entry: 11; SSE2-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer 12; SSE2-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 13; SSE2-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 14; SSE2-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 15; SSE2: land.rhs: 16; SSE2-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer 17; SSE2-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 18; SSE2-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 19; SSE2-NEXT: br label [[LAND_END]] 20; SSE2: land.end: 21; SSE2-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] 22; SSE2-NEXT: ret i1 [[TMP2]] 23; 24; SSE4-LABEL: define zeroext i1 @cmp128( 25; SSE4-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { 26; SSE4-NEXT: entry: 27; SSE4-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer 28; SSE4-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 29; SSE4-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 30; SSE4-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer 31; SSE4-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 32; SSE4-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 33; SSE4-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false 34; SSE4-NEXT: ret i1 [[TMP2]] 35; 36; AVX-LABEL: define zeroext i1 @cmp128( 37; AVX-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { 38; AVX-NEXT: entry: 39; AVX-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer 40; AVX-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 41; AVX-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 42; AVX-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer 43; AVX-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 44; AVX-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 45; AVX-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false 46; AVX-NEXT: ret i1 [[TMP2]] 47; 48entry: 49 %cmp = icmp ne <2 x i64> %x, zeroinitializer 50 %0 = bitcast <2 x i1> %cmp to i2 51 %.not = icmp eq i2 %0, 0 52 br i1 %.not, label %land.rhs, label %land.end 53 54land.rhs: 55 %cmp2 = icmp ne <2 x i64> %y, zeroinitializer 56 %1 = bitcast <2 x i1> %cmp2 to i2 57 %.not9 = icmp eq i2 %1, 0 58 br label %land.end 59 60land.end: 61 %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] 62 ret i1 %2 63} 64 65define zeroext i1 @cmp256(<4 x i64> %x, <4 x i64> %y) { 66; SSE-LABEL: define zeroext i1 @cmp256( 67; SSE-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { 68; SSE-NEXT: entry: 69; SSE-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[X]], zeroinitializer 70; SSE-NEXT: [[TMP0:%.*]] = bitcast <4 x i1> [[CMP]] to i4 71; SSE-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP0]], 0 72; SSE-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 73; SSE: land.rhs: 74; SSE-NEXT: [[CMP2:%.*]] = icmp ne <4 x i64> [[Y]], zeroinitializer 75; SSE-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[CMP2]] to i4 76; SSE-NEXT: [[DOTNOT9:%.*]] = icmp eq i4 [[TMP1]], 0 77; SSE-NEXT: br label [[LAND_END]] 78; SSE: land.end: 79; SSE-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] 80; SSE-NEXT: ret i1 [[TMP2]] 81; 82; AVX-LABEL: define zeroext i1 @cmp256( 83; AVX-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]]) #[[ATTR0]] { 84; AVX-NEXT: entry: 85; AVX-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[X]], zeroinitializer 86; AVX-NEXT: [[TMP0:%.*]] = bitcast <4 x i1> [[CMP]] to i4 87; AVX-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP0]], 0 88; AVX-NEXT: [[CMP2:%.*]] = icmp ne <4 x i64> [[Y]], zeroinitializer 89; AVX-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[CMP2]] to i4 90; AVX-NEXT: [[DOTNOT9:%.*]] = icmp eq i4 [[TMP1]], 0 91; AVX-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false 92; AVX-NEXT: ret i1 [[TMP2]] 93; 94entry: 95 %cmp = icmp ne <4 x i64> %x, zeroinitializer 96 %0 = bitcast <4 x i1> %cmp to i4 97 %.not = icmp eq i4 %0, 0 98 br i1 %.not, label %land.rhs, label %land.end 99 100land.rhs: 101 %cmp2 = icmp ne <4 x i64> %y, zeroinitializer 102 %1 = bitcast <4 x i1> %cmp2 to i4 103 %.not9 = icmp eq i4 %1, 0 104 br label %land.end 105 106land.end: 107 %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] 108 ret i1 %2 109} 110 111define zeroext i1 @cmp512(<8 x i64> %x, <8 x i64> %y) { 112; SSE-LABEL: define zeroext i1 @cmp512( 113; SSE-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { 114; SSE-NEXT: entry: 115; SSE-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer 116; SSE-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 117; SSE-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 118; SSE-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 119; SSE: land.rhs: 120; SSE-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer 121; SSE-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 122; SSE-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 123; SSE-NEXT: br label [[LAND_END]] 124; SSE: land.end: 125; SSE-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] 126; SSE-NEXT: ret i1 [[TMP2]] 127; 128; AVX2-LABEL: define zeroext i1 @cmp512( 129; AVX2-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { 130; AVX2-NEXT: entry: 131; AVX2-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer 132; AVX2-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 133; AVX2-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 134; AVX2-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 135; AVX2: land.rhs: 136; AVX2-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer 137; AVX2-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 138; AVX2-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 139; AVX2-NEXT: br label [[LAND_END]] 140; AVX2: land.end: 141; AVX2-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] 142; AVX2-NEXT: ret i1 [[TMP2]] 143; 144; AVX512-LABEL: define zeroext i1 @cmp512( 145; AVX512-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { 146; AVX512-NEXT: entry: 147; AVX512-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer 148; AVX512-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 149; AVX512-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 150; AVX512-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer 151; AVX512-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 152; AVX512-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 153; AVX512-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false 154; AVX512-NEXT: ret i1 [[TMP2]] 155; 156entry: 157 %cmp = icmp ne <8 x i64> %x, zeroinitializer 158 %0 = bitcast <8 x i1> %cmp to i8 159 %.not = icmp eq i8 %0, 0 160 br i1 %.not, label %land.rhs, label %land.end 161 162land.rhs: 163 %cmp2 = icmp ne <8 x i64> %y, zeroinitializer 164 %1 = bitcast <8 x i1> %cmp2 to i8 165 %.not9 = icmp eq i8 %1, 0 166 br label %land.end 167 168land.end: 169 %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] 170 ret i1 %2 171} 172