1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s 3; ModuleID = '<stdin>' 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" 5target triple = "i386-apple-darwin10.0" 6module asm ".globl _foo" 7module asm "_foo: ret" 8module asm ".globl _i" 9module asm ".set _i, 0" 10@i = extern_weak global i32 ; <ptr> [#uses=2] 11@j = common global i32 0 ; <ptr> [#uses=1] 12@ed = common global double 0.000000e+00, align 8 ; <ptr> [#uses=1] 13 14define i32 @main() nounwind ssp { 15; CHECK-LABEL: @main( 16; CHECK-NEXT: entry: 17; CHECK-NEXT: br label [[BB4:%.*]] 18; CHECK: bb: 19; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr @i, null 20; CHECK-NEXT: br i1 [[CMP]], label [[BB1:%.*]], label [[BB3:%.*]] 21; CHECK: bb1: 22; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 23; CHECK-NEXT: br label [[BB3]] 24; CHECK: bb3: 25; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ [[TMP0]], [[BB1]] ], [ 0, [[BB:%.*]] ] 26; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @j, align 4 27; CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[STOREMERGE]] to double 28; CHECK-NEXT: [[TMP2:%.*]] = call double @sin(double [[TMP1]]) #[[ATTR1:[0-9]+]] 29; CHECK-NEXT: [[TMP3:%.*]] = fadd double [[TMP2]], [[D_0:%.*]] 30; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[L_0:%.*]], 1 31; CHECK-NEXT: br label [[BB4]] 32; CHECK: bb4: 33; CHECK-NEXT: [[D_0]] = phi double [ undef, [[ENTRY:%.*]] ], [ [[TMP3]], [[BB3]] ] 34; CHECK-NEXT: [[L_0]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP4]], [[BB3]] ] 35; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt i32 [[L_0]], 99 36; CHECK-NEXT: br i1 [[TMP5]], label [[BB5:%.*]], label [[BB]] 37; CHECK: bb5: 38; CHECK-NEXT: store double [[D_0]], ptr @ed, align 8 39; CHECK-NEXT: ret i32 0 40; 41entry: 42 br label %bb4 43 44bb: ; preds = %bb4 45 %cmp = icmp ne ptr @i, null 46 br i1 %cmp, label %bb1, label %bb2 47 48bb1: ; preds = %bb 49 %0 = load i32, ptr @i, align 4 ; <i32> [#uses=1] 50 br label %bb3 51 52bb2: ; preds = %bb 53 br label %bb3 54 55bb3: ; preds = %bb2, %bb1 56 %storemerge = phi i32 [ %0, %bb1 ], [ 0, %bb2 ] ; <i32> [#uses=2] 57 store i32 %storemerge, ptr @j 58 %1 = sitofp i32 %storemerge to double ; <double> [#uses=1] 59 %2 = call double @sin(double %1) nounwind readonly ; <double> [#uses=1] 60 %3 = fadd double %2, %d.0 ; <double> [#uses=1] 61 %4 = add i32 %l.0, 1 ; <i32> [#uses=1] 62 br label %bb4 63 64bb4: ; preds = %bb3, %entry 65 %d.0 = phi double [ undef, %entry ], [ %3, %bb3 ] ; <double> [#uses=2] 66 %l.0 = phi i32 [ 0, %entry ], [ %4, %bb3 ] ; <i32> [#uses=2] 67 %5 = icmp sgt i32 %l.0, 99 ; <i1> [#uses=1] 68 br i1 %5, label %bb5, label %bb 69 70bb5: ; preds = %bb4 71 store double %d.0, ptr @ed, align 8 72 ret i32 0 73} 74 75declare double @sin(double) nounwind readonly 76