1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 2; RUN: opt -S -passes=separate-const-offset-from-gep < %s | FileCheck %s 3 4define void @illegal_addr_mode(ptr %in.ptr, i64 %in.idx0, i64 %in.idx1) { 5; CHECK-LABEL: define void @illegal_addr_mode( 6; CHECK-SAME: ptr [[IN_PTR:%.*]], i64 [[IN_IDX0:%.*]], i64 [[IN_IDX1:%.*]]) { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: [[BASE:%.*]] = getelementptr i64, ptr [[IN_PTR]], i64 [[IN_IDX0]] 9; CHECK-NEXT: [[IDX0:%.*]] = getelementptr i64, ptr [[BASE]], i64 [[IN_IDX1]] 10; CHECK-NEXT: [[CONST1:%.*]] = getelementptr i64, ptr [[BASE]], i64 256 11; CHECK-NEXT: [[IDX1:%.*]] = getelementptr i64, ptr [[CONST1]], i64 [[IN_IDX1]] 12; CHECK-NEXT: [[CONST2:%.*]] = getelementptr i64, ptr [[BASE]], i64 512 13; CHECK-NEXT: [[IDX2:%.*]] = getelementptr i64, ptr [[CONST2]], i64 [[IN_IDX1]] 14; CHECK-NEXT: [[CONST3:%.*]] = getelementptr i64, ptr [[BASE]], i64 768 15; CHECK-NEXT: [[IDX3:%.*]] = getelementptr i64, ptr [[CONST3]], i64 [[IN_IDX1]] 16; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i64 [[IN_IDX0]], 0 17; CHECK-NEXT: br i1 [[CMP0]], label [[BB_1:%.*]], label [[END:%.*]] 18; CHECK: bb.1: 19; CHECK-NEXT: [[VAL0:%.*]] = load <8 x i64>, ptr [[IDX0]], align 16 20; CHECK-NEXT: [[VAL1:%.*]] = load <8 x i64>, ptr [[IDX1]], align 16 21; CHECK-NEXT: [[VAL2:%.*]] = load <8 x i64>, ptr [[IDX2]], align 16 22; CHECK-NEXT: [[VAL3:%.*]] = load <8 x i64>, ptr [[IDX3]], align 16 23; CHECK-NEXT: call void asm sideeffect " 24; CHECK-NEXT: call void asm sideeffect " 25; CHECK-NEXT: call void asm sideeffect " 26; CHECK-NEXT: call void asm sideeffect " 27; CHECK-NEXT: br label [[END]] 28; CHECK: end: 29; CHECK-NEXT: call void asm sideeffect " 30; CHECK-NEXT: call void asm sideeffect " 31; CHECK-NEXT: call void asm sideeffect " 32; CHECK-NEXT: call void asm sideeffect " 33; CHECK-NEXT: ret void 34; 35entry: 36 %base = getelementptr i64, ptr %in.ptr, i64 %in.idx0 37 %idx0 = getelementptr i64, ptr %base, i64 %in.idx1 38 %const1 = getelementptr i64, ptr %base, i64 256 39 %idx1 = getelementptr i64, ptr %const1, i64 %in.idx1 40 %const2 = getelementptr i64, ptr %base, i64 512 41 %idx2 = getelementptr i64, ptr %const2, i64 %in.idx1 42 %const3 = getelementptr i64, ptr %base, i64 768 43 %idx3 = getelementptr i64, ptr %const3, i64 %in.idx1 44 %cmp0 = icmp eq i64 %in.idx0, 0 45 br i1 %cmp0, label %bb.1, label %end 46 47bb.1: 48 %val0 = load <8 x i64>, ptr %idx0, align 16 49 %val1 = load <8 x i64>, ptr %idx1, align 16 50 %val2 = load <8 x i64>, ptr %idx2, align 16 51 %val3 = load <8 x i64>, ptr %idx3, align 16 52 call void asm sideeffect "; use $0", "v"(<8 x i64> %val0) 53 call void asm sideeffect "; use $0", "v"(<8 x i64> %val1) 54 call void asm sideeffect "; use $0", "v"(<8 x i64> %val2) 55 call void asm sideeffect "; use $0", "v"(<8 x i64> %val3) 56 br label %end 57 58end: 59 call void asm sideeffect "; use $0", "v"(ptr %idx0) 60 call void asm sideeffect "; use $0", "v"(ptr %idx1) 61 call void asm sideeffect "; use $0", "v"(ptr %idx2) 62 call void asm sideeffect "; use $0", "v"(ptr %idx3) 63 ret void 64} 65 66 67define void @multi_index_reorder(ptr %in.ptr, i64 %in.idx0, i64 %in.idx1) { 68; CHECK-LABEL: define void @multi_index_reorder( 69; CHECK-SAME: ptr [[IN_PTR:%.*]], i64 [[IN_IDX0:%.*]], i64 [[IN_IDX1:%.*]]) { 70; CHECK-NEXT: entry: 71; CHECK-NEXT: [[IDX0:%.*]] = getelementptr [8192 x i64], ptr [[IN_PTR]], i64 0, i64 [[IN_IDX1]] 72; CHECK-NEXT: [[CONST1:%.*]] = getelementptr [8192 x i64], ptr [[IN_PTR]], i64 0, i64 256 73; CHECK-NEXT: [[IDX1:%.*]] = getelementptr i64, ptr [[CONST1]], i64 [[IN_IDX1]] 74; CHECK-NEXT: [[CONST2:%.*]] = getelementptr [8192 x i64], ptr [[IN_PTR]], i64 0, i64 512 75; CHECK-NEXT: [[IDX2:%.*]] = getelementptr i64, ptr [[CONST2]], i64 [[IN_IDX1]] 76; CHECK-NEXT: [[CONST3:%.*]] = getelementptr [8192 x i64], ptr [[IN_PTR]], i64 0, i64 768 77; CHECK-NEXT: [[IDX3:%.*]] = getelementptr i64, ptr [[CONST3]], i64 [[IN_IDX1]] 78; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i64 [[IN_IDX0]], 0 79; CHECK-NEXT: br i1 [[CMP0]], label [[BB_1:%.*]], label [[END:%.*]] 80; CHECK: bb.1: 81; CHECK-NEXT: [[VAL0:%.*]] = load <8 x i64>, ptr [[IDX0]], align 16 82; CHECK-NEXT: [[VAL1:%.*]] = load <8 x i64>, ptr [[IDX1]], align 16 83; CHECK-NEXT: [[VAL2:%.*]] = load <8 x i64>, ptr [[IDX2]], align 16 84; CHECK-NEXT: [[VAL3:%.*]] = load <8 x i64>, ptr [[IDX3]], align 16 85; CHECK-NEXT: call void asm sideeffect " 86; CHECK-NEXT: call void asm sideeffect " 87; CHECK-NEXT: call void asm sideeffect " 88; CHECK-NEXT: call void asm sideeffect " 89; CHECK-NEXT: br label [[END]] 90; CHECK: end: 91; CHECK-NEXT: call void asm sideeffect " 92; CHECK-NEXT: call void asm sideeffect " 93; CHECK-NEXT: call void asm sideeffect " 94; CHECK-NEXT: call void asm sideeffect " 95; CHECK-NEXT: ret void 96; 97entry: 98 %idx0 = getelementptr [8192 x i64], ptr %in.ptr, i64 0, i64 %in.idx1 99 %const1 = getelementptr [8192 x i64], ptr %in.ptr, i64 0, i64 256 100 %idx1 = getelementptr i64, ptr %const1, i64 %in.idx1 101 %const2 = getelementptr [8192 x i64], ptr %in.ptr, i64 0, i64 512 102 %idx2 = getelementptr i64, ptr %const2, i64 %in.idx1 103 %const3 = getelementptr [8192 x i64], ptr %in.ptr, i64 0, i64 768 104 %idx3 = getelementptr i64, ptr %const3, i64 %in.idx1 105 %cmp0 = icmp eq i64 %in.idx0, 0 106 br i1 %cmp0, label %bb.1, label %end 107 108bb.1: 109 %val0 = load <8 x i64>, ptr %idx0, align 16 110 %val1 = load <8 x i64>, ptr %idx1, align 16 111 %val2 = load <8 x i64>, ptr %idx2, align 16 112 %val3 = load <8 x i64>, ptr %idx3, align 16 113 call void asm sideeffect "; use $0", "v"(<8 x i64> %val0) 114 call void asm sideeffect "; use $0", "v"(<8 x i64> %val1) 115 call void asm sideeffect "; use $0", "v"(<8 x i64> %val2) 116 call void asm sideeffect "; use $0", "v"(<8 x i64> %val3) 117 br label %end 118 119end: 120 call void asm sideeffect "; use $0", "v"(ptr %idx0) 121 call void asm sideeffect "; use $0", "v"(ptr %idx1) 122 call void asm sideeffect "; use $0", "v"(ptr %idx2) 123 call void asm sideeffect "; use $0", "v"(ptr %idx3) 124 ret void 125} 126 127 128define void @different_type_reorder(ptr %in.ptr, i64 %in.idx0, i64 %in.idx1) { 129; CHECK-LABEL: define void @different_type_reorder( 130; CHECK-SAME: ptr [[IN_PTR:%.*]], i64 [[IN_IDX0:%.*]], i64 [[IN_IDX1:%.*]]) { 131; CHECK-NEXT: entry: 132; CHECK-NEXT: [[BASE:%.*]] = getelementptr i64, ptr [[IN_PTR]], i64 [[IN_IDX0]] 133; CHECK-NEXT: [[IDX0:%.*]] = getelementptr i64, ptr [[BASE]], i64 [[IN_IDX1]] 134; CHECK-NEXT: [[CONST1:%.*]] = getelementptr i8, ptr [[BASE]], i64 256 135; CHECK-NEXT: [[IDX1:%.*]] = getelementptr i64, ptr [[CONST1]], i64 [[IN_IDX1]] 136; CHECK-NEXT: [[CONST2:%.*]] = getelementptr i8, ptr [[BASE]], i64 512 137; CHECK-NEXT: [[IDX2:%.*]] = getelementptr i64, ptr [[CONST2]], i64 [[IN_IDX1]] 138; CHECK-NEXT: [[CONST3:%.*]] = getelementptr i8, ptr [[BASE]], i64 768 139; CHECK-NEXT: [[IDX3:%.*]] = getelementptr i64, ptr [[CONST3]], i64 [[IN_IDX1]] 140; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i64 [[IN_IDX0]], 0 141; CHECK-NEXT: br i1 [[CMP0]], label [[BB_1:%.*]], label [[END:%.*]] 142; CHECK: bb.1: 143; CHECK-NEXT: [[VAL0:%.*]] = load <8 x i64>, ptr [[IDX0]], align 16 144; CHECK-NEXT: [[VAL1:%.*]] = load <8 x i64>, ptr [[IDX1]], align 16 145; CHECK-NEXT: [[VAL2:%.*]] = load <8 x i64>, ptr [[IDX2]], align 16 146; CHECK-NEXT: [[VAL3:%.*]] = load <8 x i64>, ptr [[IDX3]], align 16 147; CHECK-NEXT: call void asm sideeffect " 148; CHECK-NEXT: call void asm sideeffect " 149; CHECK-NEXT: call void asm sideeffect " 150; CHECK-NEXT: call void asm sideeffect " 151; CHECK-NEXT: br label [[END]] 152; CHECK: end: 153; CHECK-NEXT: call void asm sideeffect " 154; CHECK-NEXT: call void asm sideeffect " 155; CHECK-NEXT: call void asm sideeffect " 156; CHECK-NEXT: call void asm sideeffect " 157; CHECK-NEXT: ret void 158; 159entry: 160 %base = getelementptr i64, ptr %in.ptr, i64 %in.idx0 161 %idx0 = getelementptr i64, ptr %base, i64 %in.idx1 162 %const1 = getelementptr i8, ptr %base, i64 256 163 %idx1 = getelementptr i64, ptr %const1, i64 %in.idx1 164 %const2 = getelementptr i8, ptr %base, i64 512 165 %idx2 = getelementptr i64, ptr %const2, i64 %in.idx1 166 %const3 = getelementptr i8, ptr %base, i64 768 167 %idx3 = getelementptr i64, ptr %const3, i64 %in.idx1 168 %cmp0 = icmp eq i64 %in.idx0, 0 169 br i1 %cmp0, label %bb.1, label %end 170 171bb.1: 172 %val0 = load <8 x i64>, ptr %idx0, align 16 173 %val1 = load <8 x i64>, ptr %idx1, align 16 174 %val2 = load <8 x i64>, ptr %idx2, align 16 175 %val3 = load <8 x i64>, ptr %idx3, align 16 176 call void asm sideeffect "; use $0", "v"(<8 x i64> %val0) 177 call void asm sideeffect "; use $0", "v"(<8 x i64> %val1) 178 call void asm sideeffect "; use $0", "v"(<8 x i64> %val2) 179 call void asm sideeffect "; use $0", "v"(<8 x i64> %val3) 180 br label %end 181 182end: 183 call void asm sideeffect "; use $0", "v"(ptr %idx0) 184 call void asm sideeffect "; use $0", "v"(ptr %idx1) 185 call void asm sideeffect "; use $0", "v"(ptr %idx2) 186 call void asm sideeffect "; use $0", "v"(ptr %idx3) 187 ret void 188} 189 190 191define void @different_type_reorder2(ptr %in.ptr, i64 %in.idx0, i64 %in.idx1) { 192; CHECK-LABEL: define void @different_type_reorder2( 193; CHECK-SAME: ptr [[IN_PTR:%.*]], i64 [[IN_IDX0:%.*]], i64 [[IN_IDX1:%.*]]) { 194; CHECK-NEXT: entry: 195; CHECK-NEXT: [[BASE:%.*]] = getelementptr i8, ptr [[IN_PTR]], i64 [[IN_IDX0]] 196; CHECK-NEXT: [[IDX0:%.*]] = getelementptr i8, ptr [[BASE]], i64 [[IN_IDX1]] 197; CHECK-NEXT: [[CONST1:%.*]] = getelementptr i64, ptr [[BASE]], i64 256 198; CHECK-NEXT: [[IDX1:%.*]] = getelementptr i8, ptr [[CONST1]], i64 [[IN_IDX1]] 199; CHECK-NEXT: [[CONST2:%.*]] = getelementptr i64, ptr [[BASE]], i64 512 200; CHECK-NEXT: [[IDX2:%.*]] = getelementptr i8, ptr [[CONST2]], i64 [[IN_IDX1]] 201; CHECK-NEXT: [[CONST3:%.*]] = getelementptr i64, ptr [[BASE]], i64 768 202; CHECK-NEXT: [[IDX3:%.*]] = getelementptr i8, ptr [[CONST3]], i64 [[IN_IDX1]] 203; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i64 [[IN_IDX0]], 0 204; CHECK-NEXT: br i1 [[CMP0]], label [[BB_1:%.*]], label [[END:%.*]] 205; CHECK: bb.1: 206; CHECK-NEXT: [[VAL0:%.*]] = load <8 x i64>, ptr [[IDX0]], align 16 207; CHECK-NEXT: [[VAL1:%.*]] = load <8 x i64>, ptr [[IDX1]], align 16 208; CHECK-NEXT: [[VAL2:%.*]] = load <8 x i64>, ptr [[IDX2]], align 16 209; CHECK-NEXT: [[VAL3:%.*]] = load <8 x i64>, ptr [[IDX3]], align 16 210; CHECK-NEXT: call void asm sideeffect " 211; CHECK-NEXT: call void asm sideeffect " 212; CHECK-NEXT: call void asm sideeffect " 213; CHECK-NEXT: call void asm sideeffect " 214; CHECK-NEXT: br label [[END]] 215; CHECK: end: 216; CHECK-NEXT: call void asm sideeffect " 217; CHECK-NEXT: call void asm sideeffect " 218; CHECK-NEXT: call void asm sideeffect " 219; CHECK-NEXT: call void asm sideeffect " 220; CHECK-NEXT: ret void 221; 222entry: 223 %base = getelementptr i8, ptr %in.ptr, i64 %in.idx0 224 %idx0 = getelementptr i8, ptr %base, i64 %in.idx1 225 %const1 = getelementptr i64, ptr %base, i64 256 226 %idx1 = getelementptr i8, ptr %const1, i64 %in.idx1 227 %const2 = getelementptr i64, ptr %base, i64 512 228 %idx2 = getelementptr i8, ptr %const2, i64 %in.idx1 229 %const3 = getelementptr i64, ptr %base, i64 768 230 %idx3 = getelementptr i8, ptr %const3, i64 %in.idx1 231 %cmp0 = icmp eq i64 %in.idx0, 0 232 br i1 %cmp0, label %bb.1, label %end 233 234bb.1: 235 %val0 = load <8 x i64>, ptr %idx0, align 16 236 %val1 = load <8 x i64>, ptr %idx1, align 16 237 %val2 = load <8 x i64>, ptr %idx2, align 16 238 %val3 = load <8 x i64>, ptr %idx3, align 16 239 call void asm sideeffect "; use $0", "v"(<8 x i64> %val0) 240 call void asm sideeffect "; use $0", "v"(<8 x i64> %val1) 241 call void asm sideeffect "; use $0", "v"(<8 x i64> %val2) 242 call void asm sideeffect "; use $0", "v"(<8 x i64> %val3) 243 br label %end 244 245end: 246 call void asm sideeffect "; use $0", "v"(ptr %idx0) 247 call void asm sideeffect "; use $0", "v"(ptr %idx1) 248 call void asm sideeffect "; use $0", "v"(ptr %idx2) 249 call void asm sideeffect "; use $0", "v"(ptr %idx3) 250 ret void 251} 252