1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=slp-vectorizer -S < %s | FileCheck %s 3 4; Given LLVM IR caused associative reduction matching routine crash in SLP. 5; The routines begins with select as integer Umax reduction kind 6; and then follows to llvm.umax intrinsic call which also matched 7; to UMax and thus same reduction kind is returned. 8; The routine's later code merely assumes the instruction to be a select. 9 10define dso_local void @test(i1 %arg) { 11; CHECK-LABEL: @test( 12; CHECK-NEXT: entry: 13; CHECK-NEXT: br i1 %arg, label [[NEXT:%.*]], label [[THEN:%.*]] 14; CHECK: then: 15; CHECK-NEXT: [[UM:%.*]] = call i8 @llvm.umax.i8(i8 0, i8 undef) 16; CHECK-NEXT: [[SELCMP:%.*]] = icmp ult i8 [[UM]], undef 17; CHECK-NEXT: [[I0:%.*]] = select i1 [[SELCMP]], i8 undef, i8 [[UM]] 18; CHECK-NEXT: br label [[NEXT]] 19; CHECK: next: 20; CHECK-NEXT: [[T7_0:%.*]] = phi i8 [ undef, [[ENTRY:%.*]] ], [ [[I0]], [[THEN]] ] 21; CHECK-NEXT: ret void 22; 23entry: 24 br i1 %arg, label %next, label %then 25 26then: 27 %um = call i8 @llvm.umax.i8(i8 0, i8 undef) 28 %selcmp = icmp ult i8 %um, undef 29 %i0 = select i1 %selcmp, i8 undef, i8 %um 30 br label %next 31 32next: 33 %t7.0 = phi i8 [ undef, %entry ], [ %i0, %then ] 34 ret void 35} 36 37declare i8 @llvm.umax.i8(i8, i8) 38 39declare i32 @llvm.smin.i32(i32, i32) 40declare i32 @llvm.umin.i32(i32, i32) 41 42; Given LLVM IR caused crash in SLP. 43define void @test2() { 44; CHECK-LABEL: @test2( 45; CHECK-NEXT: entry: 46; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> <i32 3, i32 2, i32 1, i32 undef>, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 0>) 47; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <4 x i32> undef, [[TMP0]] 48; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> [[TMP1]]) 49; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP2]], i32 77) 50; CHECK-NEXT: [[E:%.*]] = icmp ugt i32 [[TMP3]], 1 51; CHECK-NEXT: ret void 52; 53entry: 54 %smin0 = call i32 @llvm.smin.i32(i32 undef, i32 0) 55 %smin1 = call i32 @llvm.smin.i32(i32 undef, i32 1) 56 %smin2 = call i32 @llvm.smin.i32(i32 undef, i32 2) 57 %smin3 = call i32 @llvm.smin.i32(i32 undef, i32 3) 58 %a = sub nsw i32 undef, %smin0 59 %b = sub nsw i32 undef, %smin1 60 %c = sub nsw i32 undef, %smin2 61 %d = sub nsw i32 undef, %smin3 62 %umin0 = call i32 @llvm.umin.i32(i32 %d, i32 %c) 63 %umin1 = call i32 @llvm.umin.i32(i32 %umin0, i32 %b) 64 %umin2 = call i32 @llvm.umin.i32(i32 %umin1, i32 %a) 65 %umin3 = call i32 @llvm.umin.i32(i32 %umin2, i32 77) 66 %e = icmp ugt i32 %umin3, 1 67 ret void 68} 69