1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=x86_64 -slp-threshold=-150 | FileCheck %s --check-prefix X86 %} 3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S < %s -mtriple=aarch64-unknown-linux-gnu -slp-threshold=-150 | FileCheck %s --check-prefix AARCH64 %} 4 5define i1 @test(ptr %arg, ptr %i233, i64 %i241, ptr %i235, ptr %i237, ptr %i227) { 6; X86-LABEL: @test( 7; X86-NEXT: bb: 8; X86-NEXT: [[I226:%.*]] = getelementptr ptr, ptr [[ARG:%.*]], i32 7 9; X86-NEXT: [[I242:%.*]] = getelementptr double, ptr [[I233:%.*]], i64 [[I241:%.*]] 10; X86-NEXT: [[I245:%.*]] = getelementptr double, ptr [[I235:%.*]], i64 [[I241]] 11; X86-NEXT: [[I248:%.*]] = getelementptr double, ptr [[I237:%.*]], i64 [[I241]] 12; X86-NEXT: [[I250:%.*]] = getelementptr double, ptr [[I227:%.*]], i64 [[I241]] 13; X86-NEXT: [[TMP0:%.*]] = load <4 x ptr>, ptr [[I226]], align 8 14; X86-NEXT: [[TMP1:%.*]] = shufflevector <4 x ptr> [[TMP0]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 15; X86-NEXT: [[TMP2:%.*]] = insertelement <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, ptr [[I242]], i32 0 16; X86-NEXT: [[TMP3:%.*]] = insertelement <8 x ptr> [[TMP2]], ptr [[I250]], i32 2 17; X86-NEXT: [[TMP4:%.*]] = icmp ult <8 x ptr> [[TMP3]], [[TMP1]] 18; X86-NEXT: [[TMP5:%.*]] = insertelement <8 x ptr> poison, ptr [[I250]], i32 0 19; X86-NEXT: [[TMP6:%.*]] = insertelement <8 x ptr> [[TMP5]], ptr [[I242]], i32 1 20; X86-NEXT: [[TMP7:%.*]] = insertelement <8 x ptr> [[TMP6]], ptr [[I245]], i32 2 21; X86-NEXT: [[TMP8:%.*]] = insertelement <8 x ptr> [[TMP7]], ptr [[I248]], i32 3 22; X86-NEXT: [[TMP9:%.*]] = shufflevector <8 x ptr> [[TMP8]], <8 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 23; X86-NEXT: [[TMP10:%.*]] = shufflevector <8 x ptr> [[TMP1]], <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, <8 x i32> <i32 1, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15> 24; X86-NEXT: [[TMP11:%.*]] = icmp ult <8 x ptr> [[TMP9]], [[TMP10]] 25; X86-NEXT: [[TMP12:%.*]] = or <8 x i1> [[TMP4]], [[TMP11]] 26; X86-NEXT: [[TMP13:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP12]]) 27; X86-NEXT: [[OP_RDX:%.*]] = and i1 [[TMP13]], false 28; X86-NEXT: ret i1 [[OP_RDX]] 29; 30; AARCH64-LABEL: @test( 31; AARCH64-NEXT: bb: 32; AARCH64-NEXT: [[I226:%.*]] = getelementptr ptr, ptr [[ARG:%.*]], i32 7 33; AARCH64-NEXT: [[I242:%.*]] = getelementptr double, ptr [[I233:%.*]], i64 [[I241:%.*]] 34; AARCH64-NEXT: [[I245:%.*]] = getelementptr double, ptr [[I235:%.*]], i64 [[I241]] 35; AARCH64-NEXT: [[I248:%.*]] = getelementptr double, ptr [[I237:%.*]], i64 [[I241]] 36; AARCH64-NEXT: [[I250:%.*]] = getelementptr double, ptr [[I227:%.*]], i64 [[I241]] 37; AARCH64-NEXT: [[TMP0:%.*]] = load <4 x ptr>, ptr [[I226]], align 8 38; AARCH64-NEXT: [[TMP1:%.*]] = shufflevector <4 x ptr> [[TMP0]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 39; AARCH64-NEXT: [[TMP2:%.*]] = insertelement <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, ptr [[I242]], i32 0 40; AARCH64-NEXT: [[TMP3:%.*]] = insertelement <8 x ptr> [[TMP2]], ptr [[I250]], i32 2 41; AARCH64-NEXT: [[TMP4:%.*]] = icmp ult <8 x ptr> [[TMP3]], [[TMP1]] 42; AARCH64-NEXT: [[TMP5:%.*]] = shufflevector <8 x ptr> [[TMP3]], <8 x ptr> poison, <4 x i32> <i32 2, i32 0, i32 poison, i32 poison> 43; AARCH64-NEXT: [[TMP6:%.*]] = insertelement <4 x ptr> [[TMP5]], ptr [[I245]], i32 2 44; AARCH64-NEXT: [[TMP7:%.*]] = insertelement <4 x ptr> [[TMP6]], ptr [[I248]], i32 3 45; AARCH64-NEXT: [[TMP8:%.*]] = shufflevector <4 x ptr> [[TMP7]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 46; AARCH64-NEXT: [[TMP9:%.*]] = shufflevector <8 x ptr> [[TMP1]], <8 x ptr> <ptr poison, ptr null, ptr poison, ptr null, ptr null, ptr null, ptr null, ptr null>, <8 x i32> <i32 1, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15> 47; AARCH64-NEXT: [[TMP10:%.*]] = icmp ult <8 x ptr> [[TMP8]], [[TMP9]] 48; AARCH64-NEXT: [[TMP11:%.*]] = or <8 x i1> [[TMP4]], [[TMP10]] 49; AARCH64-NEXT: [[TMP12:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP11]]) 50; AARCH64-NEXT: [[OP_RDX:%.*]] = and i1 [[TMP12]], false 51; AARCH64-NEXT: ret i1 [[OP_RDX]] 52; 53bb: 54 %i226 = getelementptr ptr, ptr %arg, i32 7 55 %i2271 = load ptr, ptr %i226, align 8 56 %i232 = getelementptr ptr, ptr %arg, i32 8 57 %i2332 = load ptr, ptr %i232, align 8 58 %i234 = getelementptr ptr, ptr %arg, i32 9 59 %i2353 = load ptr, ptr %i234, align 8 60 %i236 = getelementptr ptr, ptr %arg, i32 10 61 %i2374 = load ptr, ptr %i236, align 8 62 %i240 = icmp ult ptr null, %i2332 63 %i242 = getelementptr double, ptr %i233, i64 %i241 64 %i243 = icmp ult ptr %i242, null 65 %i245 = getelementptr double, ptr %i235, i64 %i241 66 %i247 = icmp ult ptr null, %i2374 67 %i248 = getelementptr double, ptr %i237, i64 %i241 68 %i249 = icmp ult ptr %i248, null 69 %i250 = getelementptr double, ptr %i227, i64 %i241 70 %i251 = icmp ult ptr %i250, %i2332 71 %i252 = icmp ult ptr %i242, %i2271 72 %i253 = icmp ult ptr %i250, %i2353 73 %i254 = icmp ult ptr %i245, %i2271 74 %i255 = icmp ult ptr %i250, null 75 %i256 = icmp ult ptr null, %i2271 76 %i257 = icmp ult ptr null, %i2353 77 %i258 = icmp ult ptr %i245, null 78 %i259 = icmp ult ptr %i242, null 79 %i260 = icmp ult ptr null, %i2332 80 %i261 = icmp ult ptr null, %i2374 81 %i262 = icmp ult ptr %i248, null 82 %i263 = or i1 %i240, %i243 83 %i265 = and i1 %i263, false 84 %i266 = or i1 %i247, %i249 85 %i267 = and i1 %i265, %i266 86 %i268 = or i1 %i251, %i252 87 %i269 = and i1 %i267, %i268 88 %i270 = or i1 %i253, %i254 89 %i271 = and i1 %i269, %i270 90 %i272 = or i1 %i255, %i256 91 %i273 = and i1 %i271, %i272 92 %i274 = or i1 %i257, %i258 93 %i275 = and i1 %i273, %i274 94 %i276 = or i1 %i259, %i260 95 %i277 = and i1 %i275, %i276 96 %i278 = or i1 %i261, %i262 97 %i279 = and i1 %i277, %i278 98 ret i1 %i279 99} 100