1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5define i32 @test() { 6; CHECK-LABEL: @test( 7; CHECK-NEXT: bb: 8; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7> 9; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i32> [[TMP0]], zeroinitializer 10; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP1]]) 11; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP0]]) 12; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 [[TMP2]], [[TMP3]] 13; CHECK-NEXT: ret i32 [[OP_RDX]] 14; 15bb: 16 %0 = shufflevector <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7> 17 %1 = extractelement <4 x i32> %0, i32 3 18 %2 = extractelement <4 x i32> %0, i32 2 19 %3 = extractelement <4 x i32> %0, i32 1 20 %4 = extractelement <4 x i32> %0, i32 0 21 %inst514 = or i32 %4, 0 22 %inst494 = or i32 %3, 0 23 %inst474 = or i32 %2, 0 24 %inst454 = or i32 %1, 0 25 %inst458 = add i32 %1, %inst454 26 %inst477 = add i32 %inst458, %2 27 %inst478 = add i32 %inst477, %inst474 28 %inst497 = add i32 %inst478, %3 29 %inst498 = add i32 %inst497, %inst494 30 %inst517 = add i32 %inst498, %4 31 %inst518 = add i32 %inst517, %inst514 32 ret i32 %inst518 33} 34