1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 2; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5 6define void @test(double %add) { 7; CHECK-LABEL: define void @test( 8; CHECK-SAME: double [[ADD:%.*]]) { 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> <double poison, double 0.000000e+00>, double [[ADD]], i32 0 11; CHECK-NEXT: [[TMP1:%.*]] = fmul <2 x double> [[TMP0]], zeroinitializer 12; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], zeroinitializer 13; CHECK-NEXT: br label [[COND_TRUE45:%.*]] 14; CHECK: cond.true45: 15; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP1]], zeroinitializer 16; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP2]], zeroinitializer 17; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> zeroinitializer, [[TMP3]] 18; CHECK-NEXT: [[TMP6:%.*]] = fsub <2 x double> [[TMP5]], zeroinitializer 19; CHECK-NEXT: [[TMP7:%.*]] = fsub <2 x double> [[TMP6]], [[TMP4]] 20; CHECK-NEXT: ret void 21; 22entry: 23 %mul1 = fmul double %add, 0.000000e+00 24 %mul2 = fmul double %add, 0.000000e+00 25 %mul3 = fmul double 0.000000e+00, 0.000000e+00 26 br label %cond.true45 27 28cond.true45: 29 %mul26 = fmul double %mul1, 0.000000e+00 30 %add27 = fadd double 0.000000e+00, %mul26 31 %sub28 = fsub double %add27, 0.000000e+00 32 %mul30 = fmul double %mul2, 0.000000e+00 33 %sub31 = fsub double %sub28, %mul30 34 %mul7 = fmul double %mul3, 0.000000e+00 35 %add8 = fadd double %mul7, 0.000000e+00 36 %sub9 = fsub double %add8, 0.000000e+00 37 %mul11 = fmul double %mul3, 0.000000e+00 38 %sub12 = fsub double %sub9, %mul11 39 %0 = insertelement <2 x double> zeroinitializer, double %sub31, i32 0 40 %1 = insertelement <2 x double> %0, double %sub12, i32 1 41 ret void 42} 43