1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5define void @test() { 6; CHECK-LABEL: define void @test() { 7; CHECK-NEXT: bb: 8; CHECK-NEXT: br label [[BB1:%.*]] 9; CHECK: bb1: 10; CHECK-NEXT: [[PHI7:%.*]] = phi i32 [ 0, [[BB10:%.*]] ], [ 0, [[BB:%.*]] ] 11; CHECK-NEXT: [[TMP0:%.*]] = phi <8 x i32> [ poison, [[BB10]] ], [ zeroinitializer, [[BB]] ] 12; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> <i32 poison, i32 undef>, i32 [[PHI7]], i32 0 13; CHECK-NEXT: switch i32 0, label [[BB16:%.*]] [ 14; CHECK-NEXT: i32 0, label [[BB14:%.*]] 15; CHECK-NEXT: i32 1, label [[BB11:%.*]] 16; CHECK-NEXT: ] 17; CHECK: bb9: 18; CHECK-NEXT: br label [[BB11]] 19; CHECK: bb10: 20; CHECK-NEXT: br label [[BB1]] 21; CHECK: bb11: 22; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x i32> [ poison, [[BB9:%.*]] ], [ [[TMP1]], [[BB1]] ] 23; CHECK-NEXT: ret void 24; CHECK: bb14: 25; CHECK-NEXT: ret void 26; CHECK: bb15: 27; CHECK-NEXT: ret void 28; CHECK: bb16: 29; CHECK-NEXT: [[TMP3:%.*]] = phi <8 x i32> [ [[TMP0]], [[BB1]] ], [ poison, [[BB25:%.*]] ] 30; CHECK-NEXT: ret void 31; CHECK: bb25: 32; CHECK-NEXT: switch i32 0, label [[BB16]] [ 33; CHECK-NEXT: i32 0, label [[BB14]] 34; CHECK-NEXT: i32 1, label [[BB15:%.*]] 35; CHECK-NEXT: ] 36; 37bb: 38 br label %bb1 39 40bb1: 41 %phi = phi i32 [ 0, %bb10 ], [ 0, %bb ] 42 %phi2 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 43 %phi3 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 44 %phi4 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 45 %phi5 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 46 %phi6 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 47 %phi7 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 48 %phi8 = phi i32 [ 0, %bb10 ], [ 0, %bb ] 49 switch i32 0, label %bb16 [ 50 i32 0, label %bb14 51 i32 1, label %bb11 52 ] 53 54bb9: 55 br label %bb11 56 57bb10: 58 br label %bb1 59 60bb11: 61 %phi12 = phi i32 [ 0, %bb9 ], [ %phi7, %bb1 ] 62 %phi13 = phi i32 [ 0, %bb9 ], [ undef, %bb1 ] 63 ret void 64 65bb14: 66 ret void 67 68bb15: 69 ret void 70 71bb16: 72 %phi17 = phi i32 [ %phi, %bb1 ], [ 0, %bb25 ] 73 %phi18 = phi i32 [ %phi2, %bb1 ], [ 0, %bb25 ] 74 %phi19 = phi i32 [ %phi3, %bb1 ], [ 0, %bb25 ] 75 %phi20 = phi i32 [ %phi4, %bb1 ], [ 0, %bb25 ] 76 %phi21 = phi i32 [ %phi5, %bb1 ], [ 0, %bb25 ] 77 %phi22 = phi i32 [ %phi6, %bb1 ], [ 0, %bb25 ] 78 %phi23 = phi i32 [ %phi7, %bb1 ], [ 0, %bb25 ] 79 %phi24 = phi i32 [ %phi8, %bb1 ], [ 0, %bb25 ] 80 ret void 81 82bb25: 83 switch i32 0, label %bb16 [ 84 i32 0, label %bb14 85 i32 1, label %bb15 86 ] 87} 88