1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S -mtriple=x86_64 < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5define double @test() { 6; CHECK-LABEL: define double @test() { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr null, align 8 9; CHECK-NEXT: br label [[COND_TRUE:%.*]] 10; CHECK: cond.true: 11; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP0]], i32 1 12; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> zeroinitializer, [[TMP1]] 13; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> <i32 1, i32 1> 14; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP3]], zeroinitializer 15; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP3]], zeroinitializer 16; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> [[TMP1]], <2 x i32> <i32 0, i32 3> 17; CHECK-NEXT: [[TMP7:%.*]] = fmul <2 x double> [[TMP6]], zeroinitializer 18; CHECK-NEXT: [[TMP8:%.*]] = fsub <2 x double> [[TMP7]], zeroinitializer 19; CHECK-NEXT: [[TMP9:%.*]] = fmul <2 x double> [[TMP7]], zeroinitializer 20; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x double> [[TMP8]], <2 x double> [[TMP9]], <2 x i32> <i32 0, i32 3> 21; CHECK-NEXT: [[TMP11:%.*]] = fadd <2 x double> zeroinitializer, [[TMP10]] 22; CHECK-NEXT: [[TMP12:%.*]] = fmul <2 x double> zeroinitializer, [[TMP10]] 23; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x double> [[TMP11]], <2 x double> [[TMP12]], <2 x i32> <i32 0, i32 3> 24; CHECK-NEXT: [[TMP14:%.*]] = fsub <2 x double> [[TMP13]], [[TMP2]] 25; CHECK-NEXT: [[TMP15:%.*]] = fadd <2 x double> [[TMP13]], [[TMP2]] 26; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <2 x double> [[TMP14]], <2 x double> [[TMP15]], <2 x i32> <i32 0, i32 3> 27; CHECK-NEXT: [[TMP17:%.*]] = fsub <2 x double> [[TMP16]], zeroinitializer 28; CHECK-NEXT: [[TMP18:%.*]] = fmul <2 x double> [[TMP4]], zeroinitializer 29; CHECK-NEXT: [[TMP19:%.*]] = fmul <2 x double> zeroinitializer, [[TMP18]] 30; CHECK-NEXT: [[TMP20:%.*]] = fadd <2 x double> [[TMP19]], [[TMP17]] 31; CHECK-NEXT: [[TMP21:%.*]] = fsub <2 x double> [[TMP20]], zeroinitializer 32; CHECK-NEXT: [[TMP22:%.*]] = fmul <2 x double> [[TMP5]], zeroinitializer 33; CHECK-NEXT: [[TMP23:%.*]] = fmul <2 x double> zeroinitializer, [[TMP22]] 34; CHECK-NEXT: [[TMP24:%.*]] = fadd <2 x double> [[TMP23]], [[TMP21]] 35; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x double> [[TMP24]], i32 0 36; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x double> [[TMP24]], i32 1 37; CHECK-NEXT: [[ADD29:%.*]] = fadd double [[TMP25]], [[TMP26]] 38; CHECK-NEXT: ret double [[ADD29]] 39; 40entry: 41 %0 = load double, ptr null, align 8 42 br label %cond.true 43 44cond.true: 45 %mul13 = fmul double %0, 0.000000e+00 46 %mul14 = fmul double %0, 0.000000e+00 47 %mul15 = fmul double %mul14, 0.000000e+00 48 %mul16 = fmul double 0.000000e+00, %mul15 49 %add17 = fadd double %mul13, %mul16 50 %sub18 = fsub double %add17, 0.000000e+00 51 %mul19 = fmul double %0, 0.000000e+00 52 %mul20 = fmul double %mul19, 0.000000e+00 53 %mul21 = fmul double %mul20, 0.000000e+00 54 %add22 = fadd double %sub18, %mul21 55 %sub23 = fsub double %add22, 0.000000e+00 56 %mul24 = fmul double %0, 0.000000e+00 57 %mul25 = fmul double %mul24, 0.000000e+00 58 %mul26 = fmul double 0.000000e+00, %mul25 59 %add27 = fadd double %mul26, %sub23 60 %mul = fmul double 0.000000e+00, 0.000000e+00 61 %mul1 = fmul double %mul, 0.000000e+00 62 %sub = fsub double %mul1, 0.000000e+00 63 %add = fadd double 0.000000e+00, %sub 64 %sub2 = fsub double %add, %mul 65 %sub3 = fsub double %sub2, 0.000000e+00 66 %mul4 = fmul double %0, 0.000000e+00 67 %mul5 = fmul double %mul4, 0.000000e+00 68 %mul6 = fmul double 0.000000e+00, %mul5 69 %add7 = fadd double %mul6, %sub3 70 %sub8 = fsub double %add7, 0.000000e+00 71 %mul9 = fmul double %0, 0.000000e+00 72 %mul10 = fmul double %mul9, 0.000000e+00 73 %mul11 = fmul double 0.000000e+00, %mul10 74 %add12 = fadd double %mul11, %sub8 75 %add29 = fadd double %add12, %add27 76 ret double %add29 77} 78