1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -S -slp-threshold=-14 < %s | FileCheck %s 3 4define void @test(i32 %0, ptr %p) { 5; CHECK-LABEL: define void @test( 6; CHECK-SAME: i32 [[TMP0:%.*]], ptr [[P:%.*]]) { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> <i32 0, i32 poison, i32 0, i32 0>, i32 [[TMP0]], i32 1 9; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 1, i32 0, i32 1, i32 1> 10; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 1, i32 0> 11; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0]], 0 12; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3> 13; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[PH:%.*]] 14; CHECK: ph: 15; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> <i32 0, i32 0, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 [[TMP0]], i32 2 16; CHECK-NEXT: br label [[EXIT]] 17; CHECK: exit: 18; CHECK-NEXT: [[TMP9:%.*]] = phi <8 x i32> [ [[TMP8]], [[ENTRY:%.*]] ], [ [[TMP6]], [[PH]] ] 19; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x i32> [ [[TMP5]], [[ENTRY]] ], [ zeroinitializer, [[PH]] ] 20; CHECK-NEXT: [[OP_RDX:%.*]] = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> [[TMP9]]) 21; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP7]]) 22; CHECK-NEXT: [[OP_RDX5:%.*]] = or i32 [[TMP10]], [[TMP3]] 23; CHECK-NEXT: [[OP_RDX2:%.*]] = or i32 [[OP_RDX5]], [[OP_RDX]] 24; CHECK-NEXT: store i32 [[OP_RDX2]], ptr [[P]], align 4 25; CHECK-NEXT: ret void 26; 27entry: 28 %xor.1.i = xor i32 1, 0 29 %xor.2.i = xor i32 1, 0 30 %xor.3.i = xor i32 1, 0 31 %xor.4.i = xor i32 %0, 0 32 br i1 false, label %exit, label %ph 33 34ph: 35 br label %exit 36 37exit: 38 %p1 = phi i32 [ %xor.1.i, %entry ], [ 0, %ph ] 39 %p2 = phi i32 [ %xor.2.i, %entry ], [ 0, %ph ] 40 %p3 = phi i32 [ %xor.3.i, %entry ], [ 0, %ph ] 41 %p4 = phi i32 [ %xor.4.i, %entry ], [ 0, %ph ] 42 %p5 = phi i32 [ %xor.1.i, %entry ], [ %0, %ph ] 43 %p6 = phi i32 [ %xor.2.i, %entry ], [ 0, %ph ] 44 %p7 = phi i32 [ %xor.3.i, %entry ], [ 0, %ph ] 45 %p8 = phi i32 [ %xor.4.i, %entry ], [ 0, %ph ] 46 %p9 = phi i32 [ %xor.4.i, %entry ], [ 0, %ph ] 47 %p10 = phi i32 [ %xor.3.i, %entry ], [ 0, %ph ] 48 %p11 = phi i32 [ %xor.2.i, %entry ], [ 0, %ph ] 49 %p12 = phi i32 [ %xor.1.i, %entry ], [ 0, %ph ] 50 %or.1.1.i = or i32 %xor.4.i, %p1 51 %or.2.1.i = or i32 %or.1.1.i, %p2 52 %or.3.1.i = or i32 %or.2.1.i, %p3 53 %or.4.1.i = or i32 %or.3.1.i, %p4 54 %or.1.2.i = or i32 %or.4.1.i, %p5 55 %or.2.2.i = or i32 %or.1.2.i, %p6 56 %or.3.2.i = or i32 %or.2.2.i, %p7 57 %or.4.2.i = or i32 %or.3.2.i, %p8 58 %or.326.i = or i32 %or.4.2.i, %p9 59 %or.1.3.i = or i32 %or.326.i, %p10 60 %or.2.3.i = or i32 %or.1.3.i, %p11 61 %or.3.3.i = or i32 %or.2.3.i, %p12 62 store i32 %or.3.3.i, ptr %p, align 4 63 ret void 64} 65