1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -mtriple=x86_64-pc-linux-gnu -mcpu=generic -mattr=sse2 -passes=slp-vectorizer -pass-remarks-output=%t < %s -slp-threshold=-2 | FileCheck %s 3; RUN: FileCheck --input-file=%t --check-prefix=YAML %s 4 5define void @fextr(ptr %ptr) { 6; CHECK-LABEL: @fextr( 7; CHECK-NEXT: entry: 8; CHECK-NEXT: [[LD:%.*]] = load <8 x i16>, ptr undef, align 16 9; CHECK-NEXT: br label [[T:%.*]] 10; CHECK: t: 11; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <8 x i16> [[LD]], <8 x i16> <i16 poison, i16 undef, i16 poison, i16 poison, i16 poison, i16 poison, i16 poison, i16 poison>, <8 x i32> <i32 0, i32 9, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> 12; CHECK-NEXT: [[TMP1:%.*]] = add <8 x i16> [[LD]], [[TMP0]] 13; CHECK-NEXT: store <8 x i16> [[TMP1]], ptr [[PTR:%.*]], align 2 14; CHECK-NEXT: ret void 15; 16; YAML: Pass: slp-vectorizer 17; YAML-NEXT: Name: StoresVectorized 18; YAML-NEXT: Function: fextr 19; YAML-NEXT: Args: 20; YAML-NEXT: - String: 'Stores SLP vectorized with cost ' 21; YAML-NEXT: - Cost: '-20' 22; YAML-NEXT: - String: ' and with tree size ' 23; YAML-NEXT: - TreeSize: '4' 24 25entry: 26 %LD = load <8 x i16>, ptr undef 27 %V0 = extractelement <8 x i16> %LD, i32 0 28 br label %t 29 30t: 31 %V1 = extractelement <8 x i16> %LD, i32 1 32 %V2 = extractelement <8 x i16> %LD, i32 2 33 %V3 = extractelement <8 x i16> %LD, i32 3 34 %V4 = extractelement <8 x i16> %LD, i32 4 35 %V5 = extractelement <8 x i16> %LD, i32 5 36 %V6 = extractelement <8 x i16> %LD, i32 6 37 %V7 = extractelement <8 x i16> %LD, i32 7 38 %P1 = getelementptr inbounds i16, ptr %ptr, i64 1 39 %P2 = getelementptr inbounds i16, ptr %ptr, i64 2 40 %P3 = getelementptr inbounds i16, ptr %ptr, i64 3 41 %P4 = getelementptr inbounds i16, ptr %ptr, i64 4 42 %P5 = getelementptr inbounds i16, ptr %ptr, i64 5 43 %P6 = getelementptr inbounds i16, ptr %ptr, i64 6 44 %P7 = getelementptr inbounds i16, ptr %ptr, i64 7 45 %A0 = add i16 %V0, %V0 46 %A1 = add i16 %V1, undef 47 %A2 = add i16 %V2, %V0 48 %A3 = add i16 %V3, %V0 49 %A4 = add i16 %V4, %V0 50 %A5 = add i16 %V5, %V0 51 %A6 = add i16 %V6, %V0 52 %A7 = add i16 %V7, %V0 53 store i16 %A0, ptr %ptr, align 2 54 store i16 %A1, ptr %P1, align 2 55 store i16 %A2, ptr %P2, align 2 56 store i16 %A3, ptr %P3, align 2 57 store i16 %A4, ptr %P4, align 2 58 store i16 %A5, ptr %P5, align 2 59 store i16 %A6, ptr %P6, align 2 60 store i16 %A7, ptr %P7, align 2 61 ret void 62} 63