1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=slp-vectorizer < %s | FileCheck %s 3 4define i64 @test() { 5; CHECK-LABEL: @test( 6; CHECK-NEXT: bb1: 7; CHECK-NEXT: br label [[BB3:%.*]] 8; CHECK: bb2: 9; CHECK-NEXT: br label [[BB3]] 10; CHECK: bb3: 11; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ 0, [[BB2:%.*]] ], [ 0, [[BB1:%.*]] ] 12; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ 0, [[BB2]] ], [ 0, [[BB1]] ] 13; CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i32> poison, i32 [[TMP4]], i32 0 14; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[TMP0]], <8 x i32> poison, <8 x i32> zeroinitializer 15; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.mul.v8i32(<8 x i32> [[TMP1]]) 16; CHECK-NEXT: [[OP_RDX:%.*]] = mul i32 [[TMP2]], [[TMP4]] 17; CHECK-NEXT: [[OP_RDX1:%.*]] = mul i32 [[TMP4]], [[TMP4]] 18; CHECK-NEXT: [[OP_RDX2:%.*]] = mul i32 [[OP_RDX]], [[OP_RDX1]] 19; CHECK-NEXT: [[OP_RDX3:%.*]] = mul i32 [[OP_RDX2]], [[TMP]] 20; CHECK-NEXT: [[TMP65:%.*]] = sext i32 [[OP_RDX3]] to i64 21; CHECK-NEXT: ret i64 [[TMP65]] 22; 23bb1: 24 br label %bb3 25 26bb2: 27 br label %bb3 28 29bb3: 30 %tmp = phi i32 [ 0, %bb2 ], [ 0, %bb1 ] 31 %tmp4 = phi i32 [ 0, %bb2 ], [ 0, %bb1 ] 32 %tmp5 = mul i32 %tmp, %tmp4 33 %tmp6 = mul i32 %tmp5, %tmp4 34 %tmp7 = mul i32 %tmp6, %tmp4 35 %tmp8 = mul i32 %tmp7, %tmp4 36 %tmp9 = mul i32 %tmp8, %tmp4 37 %tmp10 = mul i32 %tmp9, %tmp4 38 %tmp11 = mul i32 %tmp10, %tmp4 39 %tmp12 = mul i32 %tmp11, %tmp4 40 %tmp13 = mul i32 %tmp12, %tmp4 41 %tmp14 = mul i32 %tmp13, %tmp4 42 %tmp15 = mul i32 %tmp14, %tmp4 43 %tmp65 = sext i32 %tmp15 to i64 44 ret i64 %tmp65 45} 46