xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/X86/phi.ll (revision 9bf6365237f3a8a401afc0a69d2fb6d1b809ce68) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=slp-vectorizer,dce -slp-threshold=-100 -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
3
4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
5target triple = "i386-apple-macosx10.9.0"
6
7;int foo(ptr A, int k) {
8;  double A0;
9;  double A1;
10;  if (k) {
11;    A0 = 3;
12;    A1 = 5;
13;  } else {
14;    A0 = A[10];
15;    A1 = A[11];
16;  }
17;  A[0] = A0;
18;  A[1] = A1;
19;}
20
21
22define i32 @foo(ptr nocapture %A, i32 %k) {
23; CHECK-LABEL: @foo(
24; CHECK-NEXT:  entry:
25; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[K:%.*]], 0
26; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[IF_END:%.*]]
27; CHECK:       if.else:
28; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 10
29; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
30; CHECK-NEXT:    br label [[IF_END]]
31; CHECK:       if.end:
32; CHECK-NEXT:    [[TMP1:%.*]] = phi <2 x double> [ [[TMP0]], [[IF_ELSE]] ], [ <double 3.000000e+00, double 5.000000e+00>, [[ENTRY:%.*]] ]
33; CHECK-NEXT:    store <2 x double> [[TMP1]], ptr [[A]], align 8
34; CHECK-NEXT:    ret i32 undef
35;
36entry:
37  %tobool = icmp eq i32 %k, 0
38  br i1 %tobool, label %if.else, label %if.end
39
40if.else:                                          ; preds = %entry
41  %arrayidx = getelementptr inbounds double, ptr %A, i64 10
42  %0 = load double, ptr %arrayidx, align 8
43  %arrayidx1 = getelementptr inbounds double, ptr %A, i64 11
44  %1 = load double, ptr %arrayidx1, align 8
45  br label %if.end
46
47if.end:                                           ; preds = %entry, %if.else
48  %A0.0 = phi double [ %0, %if.else ], [ 3.000000e+00, %entry ]
49  %A1.0 = phi double [ %1, %if.else ], [ 5.000000e+00, %entry ]
50  store double %A0.0, ptr %A, align 8
51  %arrayidx3 = getelementptr inbounds double, ptr %A, i64 1
52  store double %A1.0, ptr %arrayidx3, align 8
53  ret i32 undef
54}
55
56
57;int foo(ptr restrict B,  ptr restrict A, int n, int m) {
58;  double R=A[1];
59;  double G=A[0];
60;  for (int i=0; i < 100; i++) {
61;    R += 10;
62;    G += 10;
63;    R *= 4;
64;    G *= 4;
65;    R += 4;
66;    G += 4;
67;  }
68;  B[0] = G;
69;  B[1] = R;
70;  return 0;
71;}
72
73define i32 @foo2(ptr noalias nocapture %B, ptr noalias nocapture %A, i32 %n, i32 %m) #0 {
74; CHECK-LABEL: @foo2(
75; CHECK-NEXT:  entry:
76; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8
77; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
78; CHECK:       for.body:
79; CHECK-NEXT:    [[I_019:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
80; CHECK-NEXT:    [[TMP1:%.*]] = phi <2 x double> [ [[TMP0]], [[ENTRY]] ], [ [[TMP4:%.*]], [[FOR_BODY]] ]
81; CHECK-NEXT:    [[TMP2:%.*]] = fadd <2 x double> [[TMP1]], splat (double 1.000000e+01)
82; CHECK-NEXT:    [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], splat (double 4.000000e+00)
83; CHECK-NEXT:    [[TMP4]] = fadd <2 x double> [[TMP3]], splat (double 4.000000e+00)
84; CHECK-NEXT:    [[INC]] = add nsw i32 [[I_019]], 1
85; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 100
86; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
87; CHECK:       for.end:
88; CHECK-NEXT:    store <2 x double> [[TMP4]], ptr [[B:%.*]], align 8
89; CHECK-NEXT:    ret i32 0
90;
91entry:
92  %arrayidx = getelementptr inbounds double, ptr %A, i64 1
93  %0 = load double, ptr %arrayidx, align 8
94  %1 = load double, ptr %A, align 8
95  br label %for.body
96
97for.body:                                         ; preds = %for.body, %entry
98  %i.019 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
99  %G.018 = phi double [ %1, %entry ], [ %add5, %for.body ]
100  %R.017 = phi double [ %0, %entry ], [ %add4, %for.body ]
101  %add = fadd double %R.017, 1.000000e+01
102  %add2 = fadd double %G.018, 1.000000e+01
103  %mul = fmul double %add, 4.000000e+00
104  %mul3 = fmul double %add2, 4.000000e+00
105  %add4 = fadd double %mul, 4.000000e+00
106  %add5 = fadd double %mul3, 4.000000e+00
107  %inc = add nsw i32 %i.019, 1
108  %exitcond = icmp eq i32 %inc, 100
109  br i1 %exitcond, label %for.end, label %for.body
110
111for.end:                                          ; preds = %for.body
112  store double %add5, ptr %B, align 8
113  %arrayidx7 = getelementptr inbounds double, ptr %B, i64 1
114  store double %add4, ptr %arrayidx7, align 8
115  ret i32 0
116}
117
118; float foo3(ptr A) {
119;
120;   float R = A[0];
121;   float G = A[1];
122;   float B = A[2];
123;   float Y = A[3];
124;   float P = A[4];
125;   for (int i=0; i < 121; i+=3) {
126;     R+=Aptr7;
127;     G+=Aptr8;
128;     B+=Aptr9;
129;     Y+=Aptr10;
130;     P+=Aptr11;
131;   }
132;
133;   return R+G+B+Y+P;
134; }
135
136define float @foo3(ptr nocapture readonly %A) #0 {
137; CHECK-LABEL: @foo3(
138; CHECK-NEXT:  entry:
139; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 1
140; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x float>, ptr [[A]], align 4
141; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x float>, ptr [[ARRAYIDX1]], align 4
142; CHECK-NEXT:    [[TMP2:%.*]] = extractelement <2 x float> [[TMP0]], i32 0
143; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
144; CHECK:       for.body:
145; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
146; CHECK-NEXT:    [[R_052:%.*]] = phi float [ [[TMP2]], [[ENTRY]] ], [ [[ADD6:%.*]], [[FOR_BODY]] ]
147; CHECK-NEXT:    [[TMP3:%.*]] = phi <4 x float> [ [[TMP1]], [[ENTRY]] ], [ [[TMP15:%.*]], [[FOR_BODY]] ]
148; CHECK-NEXT:    [[TMP4:%.*]] = phi <2 x float> [ [[TMP0]], [[ENTRY]] ], [ [[TMP7:%.*]], [[FOR_BODY]] ]
149; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0
150; CHECK-NEXT:    [[MUL:%.*]] = fmul float [[TMP5]], 7.000000e+00
151; CHECK-NEXT:    [[ADD6]] = fadd float [[R_052]], [[MUL]]
152; CHECK-NEXT:    [[TMP6:%.*]] = add nsw i64 [[INDVARS_IV]], 2
153; CHECK-NEXT:    [[ARRAYIDX14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP6]]
154; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 3
155; CHECK-NEXT:    [[ARRAYIDX19:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV_NEXT]]
156; CHECK-NEXT:    [[TMP7]] = load <2 x float>, ptr [[ARRAYIDX19]], align 4
157; CHECK-NEXT:    [[TMP8:%.*]] = load <2 x float>, ptr [[ARRAYIDX14]], align 4
158; CHECK-NEXT:    [[TMP9:%.*]] = shufflevector <2 x float> [[TMP8]], <2 x float> poison, <4 x i32> <i32 poison, i32 0, i32 1, i32 poison>
159; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
160; CHECK-NEXT:    [[TMP11:%.*]] = shufflevector <4 x float> [[TMP9]], <4 x float> [[TMP10]], <4 x i32> <i32 5, i32 1, i32 2, i32 poison>
161; CHECK-NEXT:    [[TMP12:%.*]] = shufflevector <2 x float> [[TMP7]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
162; CHECK-NEXT:    [[TMP13:%.*]] = shufflevector <4 x float> [[TMP11]], <4 x float> [[TMP12]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
163; CHECK-NEXT:    [[TMP14:%.*]] = fmul <4 x float> [[TMP13]], <float 8.000000e+00, float 9.000000e+00, float 1.000000e+01, float 1.100000e+01>
164; CHECK-NEXT:    [[TMP15]] = fadd <4 x float> [[TMP3]], [[TMP14]]
165; CHECK-NEXT:    [[TMP16:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
166; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP16]], 121
167; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
168; CHECK:       for.end:
169; CHECK-NEXT:    [[TMP17:%.*]] = extractelement <4 x float> [[TMP15]], i32 0
170; CHECK-NEXT:    [[ADD28:%.*]] = fadd float [[ADD6]], [[TMP17]]
171; CHECK-NEXT:    [[TMP18:%.*]] = extractelement <4 x float> [[TMP15]], i32 1
172; CHECK-NEXT:    [[ADD29:%.*]] = fadd float [[ADD28]], [[TMP18]]
173; CHECK-NEXT:    [[TMP19:%.*]] = extractelement <4 x float> [[TMP15]], i32 2
174; CHECK-NEXT:    [[ADD30:%.*]] = fadd float [[ADD29]], [[TMP19]]
175; CHECK-NEXT:    [[TMP20:%.*]] = extractelement <4 x float> [[TMP15]], i32 3
176; CHECK-NEXT:    [[ADD31:%.*]] = fadd float [[ADD30]], [[TMP20]]
177; CHECK-NEXT:    ret float [[ADD31]]
178;
179entry:
180  %0 = load float, ptr %A, align 4
181  %arrayidx1 = getelementptr inbounds float, ptr %A, i64 1
182  %1 = load float, ptr %arrayidx1, align 4
183  %arrayidx2 = getelementptr inbounds float, ptr %A, i64 2
184  %2 = load float, ptr %arrayidx2, align 4
185  %arrayidx3 = getelementptr inbounds float, ptr %A, i64 3
186  %3 = load float, ptr %arrayidx3, align 4
187  %arrayidx4 = getelementptr inbounds float, ptr %A, i64 4
188  %4 = load float, ptr %arrayidx4, align 4
189  br label %for.body
190
191for.body:                                         ; preds = %for.body, %entry
192  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
193  %P.056 = phi float [ %4, %entry ], [ %add26, %for.body ]
194  %Y.055 = phi float [ %3, %entry ], [ %add21, %for.body ]
195  %B.054 = phi float [ %2, %entry ], [ %add16, %for.body ]
196  %G.053 = phi float [ %1, %entry ], [ %add11, %for.body ]
197  %R.052 = phi float [ %0, %entry ], [ %add6, %for.body ]
198  %5 = phi float [ %1, %entry ], [ %11, %for.body ]
199  %6 = phi float [ %0, %entry ], [ %9, %for.body ]
200  %mul = fmul float %6, 7.000000e+00
201  %add6 = fadd float %R.052, %mul
202  %mul10 = fmul float %5, 8.000000e+00
203  %add11 = fadd float %G.053, %mul10
204  %7 = add nsw i64 %indvars.iv, 2
205  %arrayidx14 = getelementptr inbounds float, ptr %A, i64 %7
206  %8 = load float, ptr %arrayidx14, align 4
207  %mul15 = fmul float %8, 9.000000e+00
208  %add16 = fadd float %B.054, %mul15
209  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 3
210  %arrayidx19 = getelementptr inbounds float, ptr %A, i64 %indvars.iv.next
211  %9 = load float, ptr %arrayidx19, align 4
212  %mul20 = fmul float %9, 1.000000e+01
213  %add21 = fadd float %Y.055, %mul20
214  %10 = add nsw i64 %indvars.iv, 4
215  %arrayidx24 = getelementptr inbounds float, ptr %A, i64 %10
216  %11 = load float, ptr %arrayidx24, align 4
217  %mul25 = fmul float %11, 1.100000e+01
218  %add26 = fadd float %P.056, %mul25
219  %12 = trunc i64 %indvars.iv.next to i32
220  %cmp = icmp slt i32 %12, 121
221  br i1 %cmp, label %for.body, label %for.end
222
223for.end:                                          ; preds = %for.body
224  %add28 = fadd float %add6, %add11
225  %add29 = fadd float %add28, %add16
226  %add30 = fadd float %add29, %add21
227  %add31 = fadd float %add30, %add26
228  ret float %add31
229}
230
231; Make sure the order of phi nodes of different types does not prevent
232; vectorization of same typed phi nodes.
233define float @sort_phi_type(ptr nocapture readonly %A) {
234; CHECK-LABEL: @sort_phi_type(
235; CHECK-NEXT:  entry:
236; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
237; CHECK:       for.body:
238; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
239; CHECK-NEXT:    [[TMP0:%.*]] = phi <4 x float> [ splat (float 1.000000e+01), [[ENTRY]] ], [ [[TMP2:%.*]], [[FOR_BODY]] ]
240; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 2>
241; CHECK-NEXT:    [[TMP2]] = fmul <4 x float> [[TMP1]], <float 8.000000e+00, float 9.000000e+00, float 1.000000e+02, float 1.110000e+02>
242; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 4
243; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], 128
244; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
245; CHECK:       for.end:
246; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
247; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP2]], i32 1
248; CHECK-NEXT:    [[ADD29:%.*]] = fadd float [[TMP3]], [[TMP4]]
249; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP2]], i32 2
250; CHECK-NEXT:    [[ADD30:%.*]] = fadd float [[ADD29]], [[TMP5]]
251; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x float> [[TMP2]], i32 3
252; CHECK-NEXT:    [[ADD31:%.*]] = fadd float [[ADD30]], [[TMP6]]
253; CHECK-NEXT:    ret float [[ADD31]]
254;
255entry:
256  br label %for.body
257
258for.body:                                         ; preds = %for.body, %entry
259  %Y = phi float [ 1.000000e+01, %entry ], [ %mul10, %for.body ]
260  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
261  %B = phi float [ 1.000000e+01, %entry ], [ %mul15, %for.body ]
262  %G = phi float [ 1.000000e+01, %entry ], [ %mul20, %for.body ]
263  %R = phi float [ 1.000000e+01, %entry ], [ %mul25, %for.body ]
264  %mul10 = fmul float %Y, 8.000000e+00
265  %mul15 = fmul float %B, 9.000000e+00
266  %mul20 = fmul float %R, 10.000000e+01
267  %mul25 = fmul float %G, 11.100000e+01
268  %indvars.iv.next = add nsw i64 %indvars.iv, 4
269  %cmp = icmp slt i64 %indvars.iv.next, 128
270  br i1 %cmp, label %for.body, label %for.end
271
272for.end:                                          ; preds = %for.body
273  %add28 = fadd float 1.000000e+01, %mul10
274  %add29 = fadd float %mul10, %mul15
275  %add30 = fadd float %add29, %mul20
276  %add31 = fadd float %add30, %mul25
277  ret float %add31
278}
279
280define void @test(ptr %i1, ptr %i2, ptr %o, i1 %arg) {
281; CHECK-LABEL: @test(
282; CHECK-NEXT:  entry:
283; CHECK-NEXT:    [[I1_0:%.*]] = load x86_fp80, ptr [[I1:%.*]], align 16
284; CHECK-NEXT:    [[I1_GEP1:%.*]] = getelementptr x86_fp80, ptr [[I1]], i64 1
285; CHECK-NEXT:    [[I1_1:%.*]] = load x86_fp80, ptr [[I1_GEP1]], align 16
286; CHECK-NEXT:    br i1 %arg, label [[THEN:%.*]], label [[END:%.*]]
287; CHECK:       then:
288; CHECK-NEXT:    [[I2_0:%.*]] = load x86_fp80, ptr [[I2:%.*]], align 16
289; CHECK-NEXT:    [[I2_GEP1:%.*]] = getelementptr inbounds x86_fp80, ptr [[I2]], i64 1
290; CHECK-NEXT:    [[I2_1:%.*]] = load x86_fp80, ptr [[I2_GEP1]], align 16
291; CHECK-NEXT:    br label [[END]]
292; CHECK:       end:
293; CHECK-NEXT:    [[PHI0:%.*]] = phi x86_fp80 [ [[I1_0]], [[ENTRY:%.*]] ], [ [[I2_0]], [[THEN]] ]
294; CHECK-NEXT:    [[PHI1:%.*]] = phi x86_fp80 [ [[I1_1]], [[ENTRY]] ], [ [[I2_1]], [[THEN]] ]
295; CHECK-NEXT:    store x86_fp80 [[PHI0]], ptr [[O:%.*]], align 16
296; CHECK-NEXT:    [[O_GEP1:%.*]] = getelementptr inbounds x86_fp80, ptr [[O]], i64 1
297; CHECK-NEXT:    store x86_fp80 [[PHI1]], ptr [[O_GEP1]], align 16
298; CHECK-NEXT:    ret void
299;
300; Test that we correctly recognize the discontiguous memory in arrays where the
301; size is less than the alignment, and through various different GEP formations.
302; We disable the vectorization of x86_fp80 for now.
303
304entry:
305  %i1.0 = load x86_fp80, ptr %i1, align 16
306  %i1.gep1 = getelementptr x86_fp80, ptr %i1, i64 1
307  %i1.1 = load x86_fp80, ptr %i1.gep1, align 16
308  br i1 %arg, label %then, label %end
309
310then:
311  %i2.0 = load x86_fp80, ptr %i2, align 16
312  %i2.gep1 = getelementptr inbounds x86_fp80, ptr %i2, i64 1
313  %i2.1 = load x86_fp80, ptr %i2.gep1, align 16
314  br label %end
315
316end:
317  %phi0 = phi x86_fp80 [ %i1.0, %entry ], [ %i2.0, %then ]
318  %phi1 = phi x86_fp80 [ %i1.1, %entry ], [ %i2.1, %then ]
319  store x86_fp80 %phi0, ptr %o, align 16
320  %o.gep1 = getelementptr inbounds x86_fp80, ptr %o, i64 1
321  store x86_fp80 %phi1, ptr %o.gep1, align 16
322  ret void
323}
324