xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux -mcpu=cascadelake < %s | FileCheck %s
3
4define i1 @test(ptr noalias %0, i64 %1, ptr noalias %p, ptr %p1) {
5; CHECK-LABEL: define i1 @test(
6; CHECK-SAME: ptr noalias [[TMP0:%.*]], i64 [[TMP1:%.*]], ptr noalias [[P:%.*]], ptr [[P1:%.*]]) #[[ATTR0:[0-9]+]] {
7; CHECK-NEXT:  newFuncRoot:
8; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 16
9; CHECK-NEXT:    [[BF_LOAD_I1336:%.*]] = load i24, ptr [[TMP2]], align 16
10; CHECK-NEXT:    [[AND_I_I_I1342:%.*]] = and i64 [[TMP1]], -16
11; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[AND_I_I_I1342]] to ptr
12; CHECK-NEXT:    store ptr [[TMP3]], ptr [[P]], align 8
13; CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 16
14; CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[TMP4]], i64 16
15; CHECK-NEXT:    [[BF_LOAD_I1345:%.*]] = load i24, ptr [[TMP5]], align 16
16; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <2 x i24> poison, i24 [[BF_LOAD_I1336]], i32 0
17; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <2 x i24> [[TMP6]], i24 [[BF_LOAD_I1345]], i32 1
18; CHECK-NEXT:    [[TMP8:%.*]] = and <2 x i24> [[TMP7]], splat (i24 255)
19; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq <2 x i24> [[TMP8]], splat (i24 24)
20; CHECK-NEXT:    [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i24> splat (i24 23), <2 x i24> [[TMP8]]
21; CHECK-NEXT:    [[TMP23:%.*]] = trunc <2 x i24> [[TMP10]] to <2 x i8>
22; CHECK-NEXT:    [[TMP26:%.*]] = zext <2 x i8> [[TMP23]] to <2 x i32>
23; CHECK-NEXT:    [[TMP13:%.*]] = and <2 x i32> [[TMP26]], splat (i32 254)
24; CHECK-NEXT:    [[TMP15:%.*]] = icmp eq <2 x i32> [[TMP13]], splat (i32 4)
25; CHECK-NEXT:    [[TMP25:%.*]] = select <2 x i1> [[TMP15]], <2 x i8> splat (i8 2), <2 x i8> [[TMP23]]
26; CHECK-NEXT:    [[TMP14:%.*]] = zext <2 x i8> [[TMP25]] to <2 x i32>
27; CHECK-NEXT:    [[TMP17:%.*]] = icmp eq <2 x i32> [[TMP14]], splat (i32 32)
28; CHECK-NEXT:    [[TMP18:%.*]] = select <2 x i1> [[TMP17]], <2 x i8> splat (i8 31), <2 x i8> [[TMP25]]
29; CHECK-NEXT:    [[TMP16:%.*]] = zext <2 x i8> [[TMP18]] to <2 x i32>
30; CHECK-NEXT:    [[TMP27:%.*]] = icmp eq <2 x i32> [[TMP16]], splat (i32 54)
31; CHECK-NEXT:    [[TMP21:%.*]] = select <2 x i1> [[TMP27]], <2 x i8> splat (i8 53), <2 x i8> [[TMP18]]
32; CHECK-NEXT:    [[TMP22:%.*]] = extractelement <2 x i8> [[TMP21]], i32 0
33; CHECK-NEXT:    [[TMP19:%.*]] = zext i8 [[TMP22]] to i32
34; CHECK-NEXT:    store i32 [[TMP19]], ptr [[P1]], align 4
35; CHECK-NEXT:    [[TMP24:%.*]] = extractelement <2 x i8> [[TMP21]], i32 1
36; CHECK-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP24]] to i32
37; CHECK-NEXT:    [[CMP210_NOT:%.*]] = icmp eq i32 [[TMP19]], [[TMP20]]
38; CHECK-NEXT:    ret i1 [[CMP210_NOT]]
39;
40newFuncRoot:
41  %2 = getelementptr inbounds i8, ptr %0, i64 16
42  %bf.load.i1336 = load i24, ptr %2, align 16
43  %bf.clear.i1337 = and i24 %bf.load.i1336, 255
44  %and.i.i.i1342 = and i64 %1, -16
45  %3 = inttoptr i64 %and.i.i.i1342 to ptr
46  store ptr %3, ptr %p, align 8
47  %4 = load ptr, ptr %3, align 16
48  %5 = getelementptr inbounds i8, ptr %4, i64 16
49  %bf.load.i1345 = load i24, ptr %5, align 16
50  %bf.clear.i1346 = and i24 %bf.load.i1345, 255
51  %cmp182 = icmp eq i24 %bf.clear.i1337, 24
52  %narrow = select i1 %cmp182, i24 23, i24 %bf.clear.i1337
53  %s = zext nneg i24 %narrow to i32
54  %cmp185 = icmp eq i24 %bf.clear.i1346, 24
55  %narrow1790 = select i1 %cmp185, i24 23, i24 %bf.clear.i1346
56  %s1139 = zext nneg i24 %narrow1790 to i32
57  %6 = and i32 %s, 254
58  %or.cond1132 = icmp eq i32 %6, 4
59  %s1142 = select i1 %or.cond1132, i32 2, i32 %s
60  %7 = and i32 %s1139, 254
61  %or.cond1133 = icmp eq i32 %7, 4
62  %s1140 = select i1 %or.cond1133, i32 2, i32 %s1139
63  %cmp198 = icmp eq i32 %s1142, 32
64  %s1134 = select i1 %cmp198, i32 31, i32 %s1142
65  %cmp201 = icmp eq i32 %s1140, 32
66  %s1143 = select i1 %cmp201, i32 31, i32 %s1140
67  %cmp204 = icmp eq i32 %s1134, 54
68  %s1135 = select i1 %cmp204, i32 53, i32 %s1134
69  store i32 %s1135, ptr %p1, align 4
70  %cmp207 = icmp eq i32 %s1143, 54
71  %s1141 = select i1 %cmp207, i32 53, i32 %s1143
72  %cmp210.not = icmp eq i32 %s1135, %s1141
73  ret i1 %cmp210.not
74}
75
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