1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 < %s | FileCheck %s 3 4%struct.rect = type { float, float, float, float } 5 6define void @foo(ptr %i7, i32 %0, i1 %tobool62.not) { 7; CHECK-LABEL: define void @foo( 8; CHECK-SAME: ptr [[I7:%.*]], i32 [[TMP0:%.*]], i1 [[TOBOOL62_NOT:%.*]]) #[[ATTR0:[0-9]+]] { 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[RC21:%.*]] = alloca [0 x [0 x %struct.rect]], i32 0, align 4 11; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i32 0 12; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <2 x i32> zeroinitializer 13; CHECK-NEXT: [[TMP4:%.*]] = sitofp <2 x i32> [[TMP3]] to <2 x float> 14; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1> 15; CHECK-NEXT: [[Y0:%.*]] = getelementptr i8, ptr [[RC21]], i64 8 16; CHECK-NEXT: [[TMP6:%.*]] = load float, ptr [[Y0]], align 4 17; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[I7]], align 4 18; CHECK-NEXT: [[TMP8:%.*]] = load <2 x float>, ptr [[RC21]], align 4 19; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP8]], <2 x float> poison, <2 x i32> <i32 1, i32 0> 20; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i32 2 21; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP6]], i32 3 22; CHECK-NEXT: [[TMP13:%.*]] = call <4 x float> @llvm.vector.insert.v4f32.v2f32(<4 x float> [[TMP10]], <2 x float> [[TMP11]], i64 0) 23; CHECK-NEXT: [[TMP12:%.*]] = fcmp olt <4 x float> [[TMP13]], zeroinitializer 24; CHECK-NEXT: [[TMP14:%.*]] = fcmp olt <4 x float> [[TMP5]], zeroinitializer 25; CHECK-NEXT: [[TMP15:%.*]] = select <4 x i1> [[TMP14]], <4 x float> [[TMP5]], <4 x float> zeroinitializer 26; CHECK-NEXT: [[TMP16:%.*]] = select <4 x i1> [[TMP12]], <4 x float> zeroinitializer, <4 x float> [[TMP15]] 27; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <4 x float> [[TMP16]], <4 x float> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2> 28; CHECK-NEXT: store <4 x float> [[TMP27]], ptr [[RC21]], align 4 29; CHECK-NEXT: br label [[IF_END:%.*]] 30; CHECK: entry.if.end72_crit_edge: 31; CHECK-NEXT: br label [[IF_END72:%.*]] 32; CHECK: if.then63: 33; CHECK-NEXT: br label [[IF_END]] 34; CHECK: if.end: 35; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x float> [ poison, [[IF_THEN63:%.*]] ], [ [[TMP16]], [[ENTRY:%.*]] ] 36; CHECK-NEXT: [[TMP18:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[TMP17]]) 37; CHECK-NEXT: [[TMP19:%.*]] = fptosi <4 x float> [[TMP18]] to <4 x i32> 38; CHECK-NEXT: br label [[IF_END72]] 39; CHECK: if.end72: 40; CHECK-NEXT: [[TMP20:%.*]] = phi <4 x i32> [ poison, [[ENTRY_IF_END72_CRIT_EDGE:%.*]] ], [ [[TMP19]], [[IF_END]] ] 41; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <4 x i32> [[TMP20]], <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2> 42; CHECK-NEXT: br i1 [[TOBOOL62_NOT]], label [[IF_END75:%.*]], label [[IF_THEN74:%.*]] 43; CHECK: if.then74: 44; CHECK-NEXT: br label [[IF_END75]] 45; CHECK: if.end75: 46; CHECK-NEXT: [[TMP22:%.*]] = phi <4 x i32> [ [[TMP20]], [[IF_THEN74]] ], [ [[TMP21]], [[IF_END72]] ] 47; CHECK-NEXT: [[TMP23:%.*]] = or <4 x i32> [[TMP22]], splat (i32 1) 48; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> poison, <4 x i32> zeroinitializer 49; CHECK-NEXT: [[TMP25:%.*]] = mul <4 x i32> [[TMP23]], [[TMP24]] 50; CHECK-NEXT: [[TMP26:%.*]] = sitofp <4 x i32> [[TMP25]] to <4 x float> 51; CHECK-NEXT: store <4 x float> [[TMP26]], ptr [[RC21]], align 4 52; CHECK-NEXT: ret void 53; 54entry: 55 %rc21 = alloca [0 x [0 x %struct.rect]], i32 0, align 4 56 %1 = load float, ptr %rc21, align 4 57 %cmp = fcmp olt float %1, 0.000000e+00 58 %conv = sitofp i32 %0 to float 59 %cmp2 = fcmp olt float %conv, 0.000000e+00 60 %cond = select i1 %cmp2, float %conv, float 0.000000e+00 61 %cond9 = select i1 %cmp, float 0.000000e+00, float %cond 62 store float %cond9, ptr %rc21, align 4 63 %x1 = getelementptr i8, ptr %rc21, i64 4 64 %2 = load float, ptr %x1, align 4 65 %cmp11 = fcmp olt float %2, 0.000000e+00 66 %conv16 = sitofp i32 %0 to float 67 %cmp17 = fcmp olt float %conv16, 0.000000e+00 68 %cond24 = select i1 %cmp17, float %conv16, float 0.000000e+00 69 %cond26 = select i1 %cmp11, float 0.000000e+00, float %cond24 70 store float %cond26, ptr %x1, align 4 71 %y0 = getelementptr i8, ptr %rc21, i64 8 72 %3 = load float, ptr %y0, align 4 73 %cmp28 = fcmp olt float %3, 0.000000e+00 74 %cmp34 = fcmp olt float %conv, 0.000000e+00 75 %cond41 = select i1 %cmp34, float %conv, float 0.000000e+00 76 %cond43 = select i1 %cmp28, float 0.000000e+00, float %cond41 77 store float %cond43, ptr %y0, align 4 78 %y11 = getelementptr i8, ptr %rc21, i64 12 79 %4 = load float, ptr %i7, align 4 80 %cmp45 = fcmp olt float %4, 0.000000e+00 81 %cmp51 = fcmp olt float %conv16, 0.000000e+00 82 %cond58 = select i1 %cmp51, float %conv16, float 0.000000e+00 83 %cond60 = select i1 %cmp45, float 0.000000e+00, float %cond58 84 store float %cond60, ptr %y11, align 4 85 br label %if.end 86 87entry.if.end72_crit_edge: 88 br label %if.end72 89 90if.then63: 91 br label %if.end 92 93if.end: 94 %5 = phi float [ 0.000000e+00, %if.then63 ], [ %cond60, %entry ] 95 %6 = phi float [ 0.000000e+00, %if.then63 ], [ %cond26, %entry ] 96 %7 = phi float [ 0.000000e+00, %if.then63 ], [ %cond43, %entry ] 97 %8 = phi float [ 0.000000e+00, %if.then63 ], [ %cond9, %entry ] 98 %9 = call float @llvm.round.f32(float %8) 99 %conv65 = fptosi float %9 to i32 100 %10 = call float @llvm.round.f32(float %7) 101 %conv67 = fptosi float %10 to i32 102 %11 = call float @llvm.round.f32(float %6) 103 %conv69 = fptosi float %11 to i32 104 %12 = call float @llvm.round.f32(float %5) 105 %conv71 = fptosi float %12 to i32 106 br label %if.end72 107 108if.end72: 109 %.pre100 = phi i32 [ 0, %entry.if.end72_crit_edge ], [ %conv71, %if.end ] 110 %.pre99 = phi i32 [ 0, %entry.if.end72_crit_edge ], [ %conv67, %if.end ] 111 %.pre98 = phi i32 [ 0, %entry.if.end72_crit_edge ], [ %conv69, %if.end ] 112 %.pre97 = phi i32 [ 0, %entry.if.end72_crit_edge ], [ %conv65, %if.end ] 113 br i1 %tobool62.not, label %if.end75, label %if.then74 114 115if.then74: 116 br label %if.end75 117 118if.end75: 119 %13 = phi i32 [ %.pre99, %if.then74 ], [ %.pre100, %if.end72 ] 120 %14 = phi i32 [ %.pre100, %if.then74 ], [ %.pre99, %if.end72 ] 121 %15 = phi i32 [ %.pre97, %if.then74 ], [ %.pre98, %if.end72 ] 122 %16 = phi i32 [ %.pre98, %if.then74 ], [ %.pre97, %if.end72 ] 123 %sub = or i32 %16, 1 124 %mul = mul i32 %sub, %0 125 %conv77 = sitofp i32 %mul to float 126 store float %conv77, ptr %rc21, align 4 127 %x178 = getelementptr i8, ptr %rc21, i64 4 128 %sub79 = or i32 %15, 1 129 %mul80 = mul i32 %sub79, %0 130 %conv81 = sitofp i32 %mul80 to float 131 store float %conv81, ptr %x178, align 4 132 %y082 = getelementptr i8, ptr %rc21, i64 8 133 %sub83 = or i32 %14, 1 134 %mul84 = mul i32 %sub83, %0 135 %conv85 = sitofp i32 %mul84 to float 136 store float %conv85, ptr %y082, align 4 137 %y186 = getelementptr i8, ptr %rc21, i64 12 138 %sub87 = or i32 %13, 1 139 %mul88 = mul i32 %sub87, %0 140 %conv89 = sitofp i32 %mul88 to float 141 store float %conv89, ptr %y186, align 4 142 ret void 143} 144