1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=slp-vectorizer -slp-threshold=-100 -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s 3; RUN: opt -S -passes=slp-vectorizer -slp-threshold=-100 -mtriple=x86_64-w64-windows-gnu\ 4; RUN: -slp-skip-early-profitability-check < %s | FileCheck %s --check-prefixes=FORCED 5 6define void @test(i16 %0) { 7; FORCED-LABEL: @test( 8; FORCED-NEXT: for.body92.preheader: 9; FORCED-NEXT: [[TMP1:%.*]] = insertelement <2 x i16> <i16 0, i16 poison>, i16 [[TMP0:%.*]], i32 1 10; FORCED-NEXT: [[TMP2:%.*]] = sext <2 x i16> [[TMP1]] to <2 x i32> 11; FORCED-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i32> 12; FORCED-NEXT: [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP3]], <2 x i32> <i32 0, i32 3> 13; FORCED-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison> 14; FORCED-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, <4 x i32> [[TMP5]], <4 x i32> <i32 4, i32 1, i32 6, i32 3> 15; FORCED-NEXT: br label [[FOR_BODY92:%.*]] 16; FORCED: for.body92: 17; FORCED-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> zeroinitializer, [[TMP6]] 18; FORCED-NEXT: store <4 x i32> [[TMP7]], ptr undef, align 8 19; FORCED-NEXT: br label [[FOR_BODY92]] 20; 21; CHECK-LABEL: @test( 22; CHECK-NEXT: for.body92.preheader: 23; CHECK-NEXT: br label [[FOR_BODY92:%.*]] 24; CHECK: for.body92: 25; CHECK-NEXT: [[CONV177_I:%.*]] = sext i16 0 to i32 26; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[TMP0:%.*]] to i32 27; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, i32 [[CONV177_I]], i32 0 28; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[TMP1]], i32 2 29; CHECK-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> zeroinitializer, [[TMP6]] 30; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr undef, align 8 31; CHECK-NEXT: br label [[FOR_BODY92]] 32; 33for.body92.preheader: 34 br label %for.body92 35 36for.body92: 37 %conv177.i = sext i16 0 to i32 38 %add178.i = add nsw i32 0, %conv177.i 39 store i32 %add178.i, ptr undef, align 8 40 %1 = zext i16 %0 to i32 41 %sum_mvr_abs.i = getelementptr i32, ptr undef, i32 2 42 %add182.i = add nsw i32 0, %1 43 store i32 %add182.i, ptr %sum_mvr_abs.i, align 8 44 %sum_mvc.i = getelementptr i32, ptr undef, i32 1 45 %add184.i = add nsw i32 0, 0 46 store i32 %add184.i, ptr %sum_mvc.i, align 4 47 %sum_mvc_abs.i = getelementptr i32, ptr undef, i32 3 48 %add188.i = add nsw i32 0, 0 49 store i32 %add188.i, ptr %sum_mvc_abs.i, align 4 50 br label %for.body92 51} 52