xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll (revision ab902ee54ac3b881f5937f5e784d49226cdd1c87) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -S < %s | FileCheck %s
3
4define void @foo(double %i) {
5; CHECK-LABEL: define void @foo(
6; CHECK-SAME: double [[I:%.*]]) #[[ATTR0:[0-9]+]] {
7; CHECK-NEXT:  bb:
8; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x double> <double 0.000000e+00, double 0.000000e+00, double poison, double 0.000000e+00>, double [[I]], i32 2
9; CHECK-NEXT:    [[TMP1:%.*]] = fsub <4 x double> zeroinitializer, [[TMP0]]
10; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <2 x double> poison, double [[I]], i32 0
11; CHECK-NEXT:    [[TMP4:%.*]] = fsub <2 x double> zeroinitializer, [[TMP3]]
12; CHECK-NEXT:    [[I82:%.*]] = fsub double 0.000000e+00, poison
13; CHECK-NEXT:    [[TMP8:%.*]] = shufflevector <4 x double> [[TMP1]], <4 x double> poison, <8 x i32> <i32 poison, i32 0, i32 poison, i32 1, i32 poison, i32 0, i32 poison, i32 1>
14; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> <double 0.000000e+00, double poison, double poison, double poison, double 0.000000e+00, double poison, double poison, double poison>, <8 x i32> <i32 8, i32 1, i32 poison, i32 3, i32 12, i32 5, i32 poison, i32 7>
15; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <8 x double> [[TMP5]], double [[I82]], i32 2
16; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 2, i32 7>
17; CHECK-NEXT:    [[TMP12:%.*]] = fmul <8 x double> <double poison, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double poison, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, [[TMP7]]
18; CHECK-NEXT:    [[TMP13:%.*]] = fadd <8 x double> zeroinitializer, [[TMP12]]
19; CHECK-NEXT:    [[TMP14:%.*]] = fadd <8 x double> [[TMP13]], zeroinitializer
20; CHECK-NEXT:    [[TMP15:%.*]] = fcmp ult <8 x double> [[TMP14]], zeroinitializer
21; CHECK-NEXT:    [[TMP16:%.*]] = freeze <8 x i1> [[TMP15]]
22; CHECK-NEXT:    [[TMP17:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP16]])
23; CHECK-NEXT:    br i1 [[TMP17]], label [[BB58:%.*]], label [[BB115:%.*]]
24; CHECK:       bb115:
25; CHECK-NEXT:    [[TMP18:%.*]] = fmul <2 x double> zeroinitializer, [[TMP4]]
26; CHECK-NEXT:    [[TMP19:%.*]] = extractelement <2 x double> [[TMP18]], i32 0
27; CHECK-NEXT:    [[TMP20:%.*]] = extractelement <2 x double> [[TMP18]], i32 1
28; CHECK-NEXT:    [[I118:%.*]] = fadd double [[TMP19]], [[TMP20]]
29; CHECK-NEXT:    [[TMP21:%.*]] = fmul <4 x double> zeroinitializer, [[TMP1]]
30; CHECK-NEXT:    [[TMP22:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
31; CHECK-NEXT:    [[TMP23:%.*]] = shufflevector <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double poison>, <4 x double> [[TMP22]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
32; CHECK-NEXT:    [[TMP24:%.*]] = fadd <4 x double> [[TMP21]], [[TMP23]]
33; CHECK-NEXT:    [[TMP25:%.*]] = fadd <4 x double> [[TMP24]], zeroinitializer
34; CHECK-NEXT:    [[TMP26:%.*]] = select <4 x i1> zeroinitializer, <4 x double> zeroinitializer, <4 x double> [[TMP25]]
35; CHECK-NEXT:    [[TMP27:%.*]] = fmul <4 x double> [[TMP26]], zeroinitializer
36; CHECK-NEXT:    [[TMP28:%.*]] = fmul <4 x double> [[TMP27]], zeroinitializer
37; CHECK-NEXT:    [[TMP29:%.*]] = fptosi <4 x double> [[TMP28]] to <4 x i32>
38; CHECK-NEXT:    [[TMP30:%.*]] = or <4 x i32> zeroinitializer, [[TMP29]]
39; CHECK-NEXT:    [[TMP31:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[TMP30]])
40; CHECK-NEXT:    [[OP_RDX:%.*]] = icmp slt i32 [[TMP31]], 32000
41; CHECK-NEXT:    [[OP_RDX1:%.*]] = select i1 [[OP_RDX]], i32 [[TMP31]], i32 32000
42; CHECK-NEXT:    [[I163:%.*]] = fcmp ogt double [[I118]], 0.000000e+00
43; CHECK-NEXT:    [[I164:%.*]] = icmp slt i32 0, [[OP_RDX1]]
44; CHECK-NEXT:    ret void
45; CHECK:       bb58:
46; CHECK-NEXT:    ret void
47;
48bb:
49  %i75 = fsub double 0.000000e+00, 0.000000e+00
50  %i76 = fsub double 0.000000e+00, 0.000000e+00
51  %i77 = fmul double 0.000000e+00, %i75
52  %i78 = fmul double 0.000000e+00, %i76
53  %i79 = fadd double %i78, 0.000000e+00
54  %i80 = fadd double %i79, 0.000000e+00
55  %i81 = fcmp ult double %i80, 0.000000e+00
56  %i82 = fsub double 0.000000e+00, poison
57  %i83 = fmul double 0.000000e+00, %i82
58  %i84 = fadd double 0.000000e+00, %i83
59  %i85 = fadd double %i84, 0.000000e+00
60  %i86 = fcmp ult double %i85, 0.000000e+00
61  %i87 = fsub double 0.000000e+00, %i
62  %i88 = fadd double 0.000000e+00, %i77
63  %i89 = fadd double %i88, 0.000000e+00
64  %i90 = fcmp ult double %i89, 0.000000e+00
65  %i91 = fsub double 0.000000e+00, 0.000000e+00
66  %i92 = fmul double poison, 0.000000e+00
67  %i93 = fadd double %i92, 0.000000e+00
68  %i94 = fadd double %i93, 0.000000e+00
69  %i95 = fcmp ult double %i94, 0.000000e+00
70  %i96 = fadd double %i79, 0.000000e+00
71  %i97 = fcmp ult double %i96, 0.000000e+00
72  %i98 = fadd double %i84, 0.000000e+00
73  %i99 = fcmp ult double %i98, 0.000000e+00
74  %i100 = fadd double 0.000000e+00, %i77
75  %i101 = fadd double %i100, 0.000000e+00
76  %i102 = fcmp ult double %i101, 0.000000e+00
77  %i103 = fsub double 0.000000e+00, %i
78  %i104 = fmul double poison, 0.000000e+00
79  %i105 = fadd double %i104, 0.000000e+00
80  %i106 = fadd double %i105, 0.000000e+00
81  %i107 = fcmp ult double %i106, 0.000000e+00
82  %i108 = select i1 %i107, i1 %i102, i1 false
83  %i109 = select i1 %i108, i1 %i99, i1 false
84  %i110 = select i1 %i109, i1 %i97, i1 false
85  %i111 = select i1 %i110, i1 %i95, i1 false
86  %i112 = select i1 %i111, i1 %i90, i1 false
87  %i113 = select i1 %i112, i1 %i86, i1 false
88  %i114 = select i1 %i113, i1 %i81, i1 false
89  br i1 %i114, label %bb58, label %bb115
90
91bb115:
92  %i116 = fmul double 0.000000e+00, %i103
93  %i117 = fmul double 0.000000e+00, %i82
94  %i118 = fadd double %i116, %i117
95  %i120 = fmul double 0.000000e+00, %i75
96  %i121 = fmul double 0.000000e+00, %i76
97  %i122 = fadd double %i121, 0.000000e+00
98  %i123 = fadd double 0.000000e+00, %i120
99  %i124 = fmul double 0.000000e+00, %i91
100  %i125 = fadd double %i124, %i82
101  %i126 = fadd double %i125, 0.000000e+00
102  %i127 = fmul double 0.000000e+00, %i87
103  %i128 = fadd double %i127, 0.000000e+00
104  %i129 = fadd double %i128, 0.000000e+00
105  %i130 = fadd double %i122, 0.000000e+00
106  %i131 = fadd double %i123, 0.000000e+00
107  %i132 = select i1 false, double 0.000000e+00, double %i131
108  %i133 = fmul double %i132, 0.000000e+00
109  %i134 = fmul double %i133, 0.000000e+00
110  %i135 = fptosi double %i134 to i32
111  %i136 = or i32 0, %i135
112  %i137 = icmp slt i32 %i136, 32000
113  %i138 = select i1 %i137, i32 %i136, i32 32000
114  %i139 = select i1 false, double 0.000000e+00, double %i130
115  %i140 = fmul double %i139, 0.000000e+00
116  %i141 = fmul double %i140, 0.000000e+00
117  %i142 = fptosi double %i141 to i32
118  %i143 = or i32 0, %i142
119  %i144 = icmp slt i32 %i143, %i138
120  %i145 = select i1 %i144, i32 %i143, i32 %i138
121  %i146 = select i1 false, double 0.000000e+00, double %i129
122  %i147 = fmul double %i146, 0.000000e+00
123  %i148 = fmul double %i147, 0.000000e+00
124  %i149 = fptosi double %i148 to i32
125  %i150 = or i32 0, %i149
126  %i151 = icmp slt i32 %i150, %i145
127  %i152 = select i1 %i151, i32 %i150, i32 %i145
128  %i153 = select i1 false, double 0.000000e+00, double %i126
129  %i154 = fmul double %i153, 0.000000e+00
130  %i155 = fmul double %i154, 0.000000e+00
131  %i156 = fptosi double %i155 to i32
132  %i157 = or i32 0, %i156
133  %i158 = icmp slt i32 %i157, %i152
134  %i159 = select i1 %i158, i32 %i157, i32 %i152
135  %i163 = fcmp ogt double %i118, 0.000000e+00
136  %i164 = icmp slt i32 0, %i159
137  ret void
138
139bb58:
140  ret void
141}
142