xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll (revision 9bf6365237f3a8a401afc0a69d2fb6d1b809ce68)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=slp-vectorizer -mtriple=x86_64-apple-macosx10.9.0 -mcpu=corei7-avx -S < %s | FileCheck %s
3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
4target triple = "x86_64-apple-macosx10.9.0"
5
6
7; This test used to crash because we were following phi chains incorrectly.
8; We used indices to get the incoming value of two phi nodes rather than
9; incoming block lookup.
10; This can give wrong results when the ordering of incoming
11; edges in the two phi nodes don't match.
12
13%0 = type { %1, %2 }
14%1 = type { double, double }
15%2 = type { double, double }
16
17
18;define fastcc void @bar() {
19define void @bar(i1 %arg) {
20; CHECK-LABEL: @bar(
21; CHECK-NEXT:  bb:
22; CHECK-NEXT:    [[I:%.*]] = getelementptr inbounds [[TMP0:%.*]], ptr undef, i64 0, i32 1, i32 0
23; CHECK-NEXT:    [[I1:%.*]] = getelementptr inbounds [[TMP0]], ptr undef, i64 0, i32 1, i32 1
24; CHECK-NEXT:    [[I2:%.*]] = getelementptr inbounds [[TMP0]], ptr undef, i64 0, i32 1, i32 0
25; CHECK-NEXT:    [[I3:%.*]] = getelementptr inbounds [[TMP0]], ptr undef, i64 0, i32 1, i32 1
26; CHECK-NEXT:    [[I4:%.*]] = getelementptr inbounds [[TMP0]], ptr undef, i64 0, i32 1, i32 0
27; CHECK-NEXT:    br label [[BB6:%.*]]
28; CHECK:       bb6:
29; CHECK-NEXT:    [[I7:%.*]] = phi double [ 2.800000e+01, [[BB:%.*]] ], [ [[I10:%.*]], [[BB17:%.*]] ], [ [[I10]], [[BB16:%.*]] ], [ [[I10]], [[BB16]] ]
30; CHECK-NEXT:    [[I8:%.*]] = phi double [ 1.800000e+01, [[BB]] ], [ [[TMP1:%.*]], [[BB17]] ], [ [[TMP1]], [[BB16]] ], [ [[TMP1]], [[BB16]] ]
31; CHECK-NEXT:    store double [[I8]], ptr [[I]], align 8
32; CHECK-NEXT:    store double [[I7]], ptr [[I1]], align 8
33; CHECK-NEXT:    [[I10]] = load double, ptr [[I3]], align 8
34; CHECK-NEXT:    [[TMP0]] = load <2 x double>, ptr [[I2]], align 8
35; CHECK-NEXT:    br i1 %arg, label [[BB11:%.*]], label [[BB12:%.*]]
36; CHECK:       bb11:
37; CHECK-NEXT:    ret void
38; CHECK:       bb12:
39; CHECK-NEXT:    store <2 x double> [[TMP0]], ptr [[I4]], align 8
40; CHECK-NEXT:    br i1 %arg, label [[BB13:%.*]], label [[BB14:%.*]]
41; CHECK:       bb13:
42; CHECK-NEXT:    br label [[BB14]]
43; CHECK:       bb14:
44; CHECK-NEXT:    br i1 %arg, label [[BB15:%.*]], label [[BB16]]
45; CHECK:       bb15:
46; CHECK-NEXT:    unreachable
47; CHECK:       bb16:
48; CHECK-NEXT:    [[TMP1]] = extractelement <2 x double> [[TMP0]], i32 0
49; CHECK-NEXT:    switch i32 undef, label [[BB17]] [
50; CHECK-NEXT:      i32 32, label [[BB6]]
51; CHECK-NEXT:      i32 103, label [[BB6]]
52; CHECK-NEXT:    ]
53; CHECK:       bb17:
54; CHECK-NEXT:    br i1 %arg, label [[BB6]], label [[BB18:%.*]]
55; CHECK:       bb18:
56; CHECK-NEXT:    unreachable
57;
58bb:
59  %i = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 0
60  %i1 = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 1
61  %i2 = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 0
62  %i3 = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 1
63  %i4 = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 0
64  %i5 = getelementptr inbounds %0, ptr undef, i64 0, i32 1, i32 1
65  br label %bb6
66
67bb6:                                              ; preds = %bb17, %bb16, %bb16, %bb
68  %i7 = phi double [ 2.800000e+01, %bb ], [ %i10, %bb17 ], [ %i10, %bb16 ], [ %i10, %bb16 ]
69  %i8 = phi double [ 1.800000e+01, %bb ], [ %i9, %bb17 ], [ %i9, %bb16 ], [ %i9, %bb16 ]
70  store double %i8, ptr %i, align 8
71  store double %i7, ptr %i1, align 8
72  %i9 = load double, ptr %i2, align 8
73  %i10 = load double, ptr %i3, align 8
74  br i1 %arg, label %bb11, label %bb12
75
76bb11:                                             ; preds = %bb6
77  ret void
78
79bb12:                                             ; preds = %bb6
80  store double %i9, ptr %i4, align 8
81  store double %i10, ptr %i5, align 8
82  br i1 %arg, label %bb13, label %bb14
83
84bb13:                                             ; preds = %bb12
85  br label %bb14
86
87bb14:                                             ; preds = %bb13, %bb12
88  br i1 %arg, label %bb15, label %bb16
89
90bb15:                                             ; preds = %bb14
91  unreachable
92
93bb16:                                             ; preds = %bb14
94  switch i32 undef, label %bb17 [
95  i32 32, label %bb6
96  i32 103, label %bb6
97  ]
98
99bb17:                                             ; preds = %bb16
100  br i1 %arg, label %bb6, label %bb18
101
102bb18:                                             ; preds = %bb17
103  unreachable
104}
105