1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2;RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-android23 < %s | FileCheck %s 3 4define void @test() { 5; CHECK-LABEL: @test( 6; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr undef, i32 2 7; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[TMP1]], align 4 8; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr undef, align 4 9; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x float> [[TMP2]], [[TMP3]] 10; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0 11; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1 12; CHECK-NEXT: [[TMP7:%.*]] = fcmp olt float [[TMP6]], [[TMP5]] 13; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x float> zeroinitializer, float 0.000000e+00, i64 0 14; CHECK-NEXT: store <2 x float> zeroinitializer, ptr null, align 4 15; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <2 x i32> <i32 1, i32 poison> 16; CHECK-NEXT: store <2 x float> zeroinitializer, ptr null, align 4 17; CHECK-NEXT: ret void 18; 19 %1 = getelementptr inbounds float, ptr undef, i32 2 20 %2 = load float, ptr %1, align 4 21 %3 = load float, ptr undef, align 4 22 %4 = fsub float %2, %3 23 %5 = getelementptr inbounds float, ptr undef, i32 3 24 %6 = load float, ptr %5, align 4 25 %7 = getelementptr inbounds float, ptr undef, i32 1 26 %8 = load float, ptr %7, align 4 27 %9 = fsub float %6, %8 28 %10 = fcmp olt float %9, %4 29 %11 = insertelement <2 x float> undef, float %3, i64 0 30 %12 = insertelement <2 x float> zeroinitializer, float 0.000000e+00, i64 0 31 store <2 x float> zeroinitializer, ptr null, align 4 32 %13 = insertelement <2 x float> %11, float %6, i64 0 33 store <2 x float> zeroinitializer, ptr null, align 4 34 ret void 35} 36 37define void @test1() { 38; CHECK-LABEL: @test1( 39; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr undef, i32 2 40; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[TMP1]], align 4 41; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr undef, align 4 42; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x float> [[TMP2]], [[TMP3]] 43; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0 44; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1 45; CHECK-NEXT: [[TMP7:%.*]] = fcmp olt float [[TMP6]], [[TMP5]] 46; CHECK-NEXT: store <2 x float> [[TMP3]], ptr null, align 4 47; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> [[TMP2]], <2 x i32> <i32 0, i32 3> 48; CHECK-NEXT: store <2 x float> [[TMP8]], ptr null, align 4 49; CHECK-NEXT: ret void 50; 51 %1 = getelementptr inbounds float, ptr undef, i32 2 52 %2 = load float, ptr %1, align 4 53 %3 = load float, ptr undef, align 4 54 %4 = fsub float %2, %3 55 %5 = getelementptr inbounds float, ptr undef, i32 3 56 %6 = load float, ptr %5, align 4 57 %7 = getelementptr inbounds float, ptr undef, i32 1 58 %8 = load float, ptr %7, align 4 59 %9 = fsub float %6, %8 60 %10 = fcmp olt float %9, %4 61 %.sroa.0.0.vec.insert.i5.i10 = insertelement <2 x float> undef, float %3, i64 0 62 %.sroa.0.4.vec.insert.i10.i13 = insertelement <2 x float> %.sroa.0.0.vec.insert.i5.i10, float %8, i64 1 63 store <2 x float> %.sroa.0.4.vec.insert.i10.i13, ptr null, align 4 64 %.sroa.0.4.vec.insert.i10.i13.2 = insertelement <2 x float> %.sroa.0.0.vec.insert.i5.i10, float %6, i64 1 65 store <2 x float> %.sroa.0.4.vec.insert.i10.i13.2, ptr null, align 4 66 ret void 67} 68 69