1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-apple-macosx10.8.0" 6 7define i32 @foo(ptr nocapture %A, i32 %n) { 8; CHECK-LABEL: @foo( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (...) @bar() 11; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 12; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> zeroinitializer 13; CHECK-NEXT: [[TMP1:%.*]] = mul nsw <4 x i32> [[SHUFFLE]], <i32 5, i32 9, i32 3, i32 10> 14; CHECK-NEXT: [[TMP2:%.*]] = shl <4 x i32> [[SHUFFLE]], <i32 5, i32 9, i32 3, i32 10> 15; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 6, i32 3> 16; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], splat (i32 9) 17; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[A:%.*]], align 4 18; CHECK-NEXT: ret i32 undef 19; 20entry: 21 %call = tail call i32 (...) @bar() #2 22 %mul = mul nsw i32 %n, 5 23 %add = add nsw i32 %mul, 9 24 store i32 %add, ptr %A, align 4 25 %mul1 = mul nsw i32 %n, 9 26 %add2 = add nsw i32 %mul1, 9 27 %arrayidx3 = getelementptr inbounds i32, ptr %A, i64 1 28 store i32 %add2, ptr %arrayidx3, align 4 29 %mul4 = shl i32 %n, 3 30 %add5 = add nsw i32 %mul4, 9 31 %arrayidx6 = getelementptr inbounds i32, ptr %A, i64 2 32 store i32 %add5, ptr %arrayidx6, align 4 33 %mul7 = mul nsw i32 %n, 10 34 %add8 = add nsw i32 %mul7, 9 35 %arrayidx9 = getelementptr inbounds i32, ptr %A, i64 3 36 store i32 %add8, ptr %arrayidx9, align 4 37 ret i32 undef 38} 39 40 ; We can still vectorize the stores below. 41 42declare i32 @bar(...) 43