1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux < %s | FileCheck %s 3 4define i32 @test(ptr %n, i32 %conv57, i1 %tobool5.not, i64 %bf.load14) { 5; CHECK-LABEL: define i32 @test( 6; CHECK-SAME: ptr [[N:%.*]], i32 [[CONV57:%.*]], i1 [[TOBOOL5_NOT:%.*]], i64 [[BF_LOAD14:%.*]]) { 7; CHECK-NEXT: [[ENTRY:.*]]: 8; CHECK-NEXT: br i1 false, label %[[ENTRY_IF_END54_CRIT_EDGE:.*]], label %[[WHILE_COND:.*]] 9; CHECK: [[ENTRY_IF_END54_CRIT_EDGE]]: 10; CHECK-NEXT: br label %[[IF_END54:.*]] 11; CHECK: [[TTHREAD_PRE_SPLIT:.*]]: 12; CHECK-NEXT: br label %[[T:.*]] 13; CHECK: [[T]]: 14; CHECK-NEXT: [[W_2:%.*]] = phi i32 [ 1, %[[TTHREAD_PRE_SPLIT]] ], [ 0, %[[IF_END83:.*]] ] 15; CHECK-NEXT: br label %[[IF_END7:.*]] 16; CHECK: [[T_U_CRIT_EDGE:.*]]: 17; CHECK-NEXT: br label %[[IF_END7]] 18; CHECK: [[IF_END7]]: 19; CHECK-NEXT: [[W_4:%.*]] = phi i32 [ [[W_2]], %[[T]] ], [ [[W_2]], %[[T_U_CRIT_EDGE]] ], [ [[BF_CAST25:%.*]], %[[WHILE_BODY:.*]] ] 20; CHECK-NEXT: [[A_4:%.*]] = phi i32 [ 0, %[[T]] ], [ [[CONV57]], %[[T_U_CRIT_EDGE]] ], [ [[BF_CAST2910:%.*]], %[[WHILE_BODY]] ] 21; CHECK-NEXT: [[B_4:%.*]] = phi i32 [ 0, %[[T]] ], [ 0, %[[T_U_CRIT_EDGE]] ], [ [[BF_CAST2910]], %[[WHILE_BODY]] ] 22; CHECK-NEXT: [[C_4:%.*]] = phi i32 [ 0, %[[T]] ], [ 1, %[[T_U_CRIT_EDGE]] ], [ poison, %[[WHILE_BODY]] ] 23; CHECK-NEXT: br label %[[V:.*]] 24; CHECK: [[WHILE_COND]]: 25; CHECK-NEXT: [[BF_LOAD66_PRE_PRE1135:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT:%.*]], %[[IF_END42:.*]] ] 26; CHECK-NEXT: br i1 [[TOBOOL5_NOT]], label %[[IF_END54]], label %[[WHILE_BODY]] 27; CHECK: [[WHILE_BODY]]: 28; CHECK-NEXT: [[BF_ASHR24:%.*]] = ashr i64 [[BF_LOAD14]], 33 29; CHECK-NEXT: [[BF_CAST25]] = trunc nsw i64 [[BF_ASHR24]] to i32 30; CHECK-NEXT: [[BF_ASHR28:%.*]] = lshr i64 [[BF_LOAD14]], 1 31; CHECK-NEXT: [[BF_CAST2910]] = trunc i64 [[BF_ASHR28]] to i32 32; CHECK-NEXT: br label %[[IF_END7]] 33; CHECK: [[IF_END36:.*]]: 34; CHECK-NEXT: br label %[[V]] 35; CHECK: [[V]]: 36; CHECK-NEXT: [[C_7:%.*]] = phi i32 [ [[C_4]], %[[IF_END7]] ], [ 0, %[[IF_END36]] ] 37; CHECK-NEXT: br i1 true, label %[[IF_END42]], label %[[V_IF_END83_CRIT_EDGE:.*]] 38; CHECK: [[V_IF_END83_CRIT_EDGE]]: 39; CHECK-NEXT: br label %[[IF_END83]] 40; CHECK: [[IF_END42]]: 41; CHECK-NEXT: [[TOBOOL43_NOT:%.*]] = icmp eq i32 [[B_4]], 0 42; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[TOBOOL43_NOT]], i32 0, i32 [[W_4]] 43; CHECK-NEXT: [[SPEC_SELECT]] = zext i32 [[NARROW]] to i64 44; CHECK-NEXT: [[BF_VALUE48:%.*]] = zext i32 [[A_4]] to i64 45; CHECK-NEXT: store i64 [[BF_VALUE48]], ptr [[N]], align 8 46; CHECK-NEXT: store i32 [[C_7]], ptr [[N]], align 4 47; CHECK-NEXT: br label %[[WHILE_COND]] 48; CHECK: [[IF_END54]]: 49; CHECK-NEXT: [[BF_LOAD66_PRE_PRE113125:%.*]] = phi i64 [ [[BF_LOAD66_PRE_PRE1135]], %[[WHILE_COND]] ], [ poison, %[[ENTRY_IF_END54_CRIT_EDGE]] ] 50; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[BF_LOAD66_PRE_PRE113125]], 0 51; CHECK-NEXT: br i1 [[TMP0]], label %[[IF_END83]], label %[[AI_IF_END76_CRIT_EDGE:.*]] 52; CHECK: [[AI_IF_END76_CRIT_EDGE]]: 53; CHECK-NEXT: br label %[[IF_END83]] 54; CHECK: [[IF_END83]]: 55; CHECK-NEXT: br label %[[T]] 56; 57entry: 58 br i1 false, label %entry.if.end54_crit_edge, label %while.cond 59 60entry.if.end54_crit_edge: 61 br label %if.end54 62 63tthread-pre-split: 64 br label %t 65 66t: 67 %w.2 = phi i32 [ 1, %tthread-pre-split ], [ 0, %if.end83 ] 68 br label %if.end7 69 70t.u_crit_edge: 71 br label %if.end7 72 73if.end7: 74 %w.4 = phi i32 [ %w.2, %t ], [ %w.2, %t.u_crit_edge ], [ %bf.cast25, %while.body ] 75 %a.4 = phi i32 [ 0, %t ], [ %conv57, %t.u_crit_edge ], [ %bf.cast2910, %while.body ] 76 %b.4 = phi i32 [ 0, %t ], [ 0, %t.u_crit_edge ], [ %bf.cast2910, %while.body ] 77 %c.4 = phi i32 [ 0, %t ], [ 1, %t.u_crit_edge ], [ poison, %while.body ] 78 br label %v 79 80while.cond: 81 %bf.load66.pre.pre1135 = phi i64 [ 0, %entry ], [ %spec.select, %if.end42 ] 82 br i1 %tobool5.not, label %if.end54, label %while.body 83 84while.body: 85 %bf.ashr24 = ashr i64 %bf.load14, 33 86 %bf.cast25 = trunc nsw i64 %bf.ashr24 to i32 87 %bf.ashr28 = lshr i64 %bf.load14, 1 88 %bf.cast2910 = trunc i64 %bf.ashr28 to i32 89 br label %if.end7 90 91if.end36: 92 br label %v 93 94v: 95 %c.7 = phi i32 [ %c.4, %if.end7 ], [ 0, %if.end36 ] 96 br i1 true, label %if.end42, label %v.if.end83_crit_edge 97 98v.if.end83_crit_edge: 99 br label %if.end83 100 101if.end42: 102 %tobool43.not = icmp eq i32 %b.4, 0 103 %narrow = select i1 %tobool43.not, i32 0, i32 %w.4 104 %spec.select = zext i32 %narrow to i64 105 %bf.value48 = zext i32 %a.4 to i64 106 store i64 %bf.value48, ptr %n, align 8 107 store i32 %c.7, ptr %n, align 4 108 br label %while.cond 109 110if.end54: 111 %bf.load66.pre.pre113125 = phi i64 [ %bf.load66.pre.pre1135, %while.cond ], [ poison, %entry.if.end54_crit_edge ] 112 %0 = icmp eq i64 %bf.load66.pre.pre113125, 0 113 br i1 %0, label %if.end83, label %ai.if.end76_crit_edge 114 115ai.if.end76_crit_edge: 116 br label %if.end83 117 118if.end83: 119 br label %t 120} 121