1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer,instcombine -S | FileCheck %s 3; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=slm -passes=slp-vectorizer,instcombine -S | FileCheck %s 4; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=corei7-avx -passes=slp-vectorizer,instcombine -S | FileCheck %s 5; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=core-avx2 -passes=slp-vectorizer,instcombine -S | FileCheck %s 6; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=knl -passes=slp-vectorizer,instcombine -S | FileCheck %s 7; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skx -passes=slp-vectorizer,instcombine -S | FileCheck %s 8 9define <8 x float> @sitofp_uitofp(<8 x i32> %a) { 10; CHECK-LABEL: @sitofp_uitofp( 11; CHECK-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[A:%.*]] to <8 x float> 12; CHECK-NEXT: [[TMP2:%.*]] = uitofp <8 x i32> [[A]] to <8 x float> 13; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15> 14; CHECK-NEXT: ret <8 x float> [[TMP3]] 15; 16 %a0 = extractelement <8 x i32> %a, i32 0 17 %a1 = extractelement <8 x i32> %a, i32 1 18 %a2 = extractelement <8 x i32> %a, i32 2 19 %a3 = extractelement <8 x i32> %a, i32 3 20 %a4 = extractelement <8 x i32> %a, i32 4 21 %a5 = extractelement <8 x i32> %a, i32 5 22 %a6 = extractelement <8 x i32> %a, i32 6 23 %a7 = extractelement <8 x i32> %a, i32 7 24 %ab0 = sitofp i32 %a0 to float 25 %ab1 = sitofp i32 %a1 to float 26 %ab2 = sitofp i32 %a2 to float 27 %ab3 = sitofp i32 %a3 to float 28 %ab4 = uitofp i32 %a4 to float 29 %ab5 = uitofp i32 %a5 to float 30 %ab6 = uitofp i32 %a6 to float 31 %ab7 = uitofp i32 %a7 to float 32 %r0 = insertelement <8 x float> undef, float %ab0, i32 0 33 %r1 = insertelement <8 x float> %r0, float %ab1, i32 1 34 %r2 = insertelement <8 x float> %r1, float %ab2, i32 2 35 %r3 = insertelement <8 x float> %r2, float %ab3, i32 3 36 %r4 = insertelement <8 x float> %r3, float %ab4, i32 4 37 %r5 = insertelement <8 x float> %r4, float %ab5, i32 5 38 %r6 = insertelement <8 x float> %r5, float %ab6, i32 6 39 %r7 = insertelement <8 x float> %r6, float %ab7, i32 7 40 ret <8 x float> %r7 41} 42 43define <8 x i32> @fptosi_fptoui(<8 x float> %a) { 44; CHECK-LABEL: @fptosi_fptoui( 45; CHECK-NEXT: [[TMP1:%.*]] = fptosi <8 x float> [[A:%.*]] to <8 x i32> 46; CHECK-NEXT: [[TMP2:%.*]] = fptoui <8 x float> [[A]] to <8 x i32> 47; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15> 48; CHECK-NEXT: ret <8 x i32> [[TMP3]] 49; 50 %a0 = extractelement <8 x float> %a, i32 0 51 %a1 = extractelement <8 x float> %a, i32 1 52 %a2 = extractelement <8 x float> %a, i32 2 53 %a3 = extractelement <8 x float> %a, i32 3 54 %a4 = extractelement <8 x float> %a, i32 4 55 %a5 = extractelement <8 x float> %a, i32 5 56 %a6 = extractelement <8 x float> %a, i32 6 57 %a7 = extractelement <8 x float> %a, i32 7 58 %ab0 = fptosi float %a0 to i32 59 %ab1 = fptosi float %a1 to i32 60 %ab2 = fptosi float %a2 to i32 61 %ab3 = fptosi float %a3 to i32 62 %ab4 = fptoui float %a4 to i32 63 %ab5 = fptoui float %a5 to i32 64 %ab6 = fptoui float %a6 to i32 65 %ab7 = fptoui float %a7 to i32 66 %r0 = insertelement <8 x i32> undef, i32 %ab0, i32 0 67 %r1 = insertelement <8 x i32> %r0, i32 %ab1, i32 1 68 %r2 = insertelement <8 x i32> %r1, i32 %ab2, i32 2 69 %r3 = insertelement <8 x i32> %r2, i32 %ab3, i32 3 70 %r4 = insertelement <8 x i32> %r3, i32 %ab4, i32 4 71 %r5 = insertelement <8 x i32> %r4, i32 %ab5, i32 5 72 %r6 = insertelement <8 x i32> %r5, i32 %ab6, i32 6 73 %r7 = insertelement <8 x i32> %r6, i32 %ab7, i32 7 74 ret <8 x i32> %r7 75} 76 77define <8 x float> @fneg_fabs(<8 x float> %a) { 78; CHECK-LABEL: @fneg_fabs( 79; CHECK-NEXT: [[TMP1:%.*]] = fneg <8 x float> [[A:%.*]] 80; CHECK-NEXT: [[TMP2:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> [[A]]) 81; CHECK-NEXT: [[DOTUNCASTED:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15> 82; CHECK-NEXT: ret <8 x float> [[DOTUNCASTED]] 83; 84 %a0 = extractelement <8 x float> %a, i32 0 85 %a1 = extractelement <8 x float> %a, i32 1 86 %a2 = extractelement <8 x float> %a, i32 2 87 %a3 = extractelement <8 x float> %a, i32 3 88 %a4 = extractelement <8 x float> %a, i32 4 89 %a5 = extractelement <8 x float> %a, i32 5 90 %a6 = extractelement <8 x float> %a, i32 6 91 %a7 = extractelement <8 x float> %a, i32 7 92 %aa0 = bitcast float %a0 to i32 93 %aa1 = bitcast float %a1 to i32 94 %aa2 = bitcast float %a2 to i32 95 %aa3 = bitcast float %a3 to i32 96 %aa4 = bitcast float %a4 to i32 97 %aa5 = bitcast float %a5 to i32 98 %aa6 = bitcast float %a6 to i32 99 %aa7 = bitcast float %a7 to i32 100 %ab0 = xor i32 %aa0, -2147483648 101 %ab1 = xor i32 %aa1, -2147483648 102 %ab2 = xor i32 %aa2, -2147483648 103 %ab3 = xor i32 %aa3, -2147483648 104 %ab4 = and i32 %aa4, 2147483647 105 %ab5 = and i32 %aa5, 2147483647 106 %ab6 = and i32 %aa6, 2147483647 107 %ab7 = and i32 %aa7, 2147483647 108 %ac0 = bitcast i32 %ab0 to float 109 %ac1 = bitcast i32 %ab1 to float 110 %ac2 = bitcast i32 %ab2 to float 111 %ac3 = bitcast i32 %ab3 to float 112 %ac4 = bitcast i32 %ab4 to float 113 %ac5 = bitcast i32 %ab5 to float 114 %ac6 = bitcast i32 %ab6 to float 115 %ac7 = bitcast i32 %ab7 to float 116 %r0 = insertelement <8 x float> undef, float %ac0, i32 0 117 %r1 = insertelement <8 x float> %r0, float %ac1, i32 1 118 %r2 = insertelement <8 x float> %r1, float %ac2, i32 2 119 %r3 = insertelement <8 x float> %r2, float %ac3, i32 3 120 %r4 = insertelement <8 x float> %r3, float %ac4, i32 4 121 %r5 = insertelement <8 x float> %r4, float %ac5, i32 5 122 %r6 = insertelement <8 x float> %r5, float %ac6, i32 6 123 %r7 = insertelement <8 x float> %r6, float %ac7, i32 7 124 ret <8 x float> %r7 125} 126 127define <8 x i32> @sext_zext(<8 x i16> %a) { 128; CHECK-LABEL: @sext_zext( 129; CHECK-NEXT: [[TMP1:%.*]] = sext <8 x i16> [[A:%.*]] to <8 x i32> 130; CHECK-NEXT: [[TMP2:%.*]] = zext <8 x i16> [[A]] to <8 x i32> 131; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15> 132; CHECK-NEXT: ret <8 x i32> [[TMP3]] 133; 134 %a0 = extractelement <8 x i16> %a, i32 0 135 %a1 = extractelement <8 x i16> %a, i32 1 136 %a2 = extractelement <8 x i16> %a, i32 2 137 %a3 = extractelement <8 x i16> %a, i32 3 138 %a4 = extractelement <8 x i16> %a, i32 4 139 %a5 = extractelement <8 x i16> %a, i32 5 140 %a6 = extractelement <8 x i16> %a, i32 6 141 %a7 = extractelement <8 x i16> %a, i32 7 142 %ab0 = sext i16 %a0 to i32 143 %ab1 = sext i16 %a1 to i32 144 %ab2 = sext i16 %a2 to i32 145 %ab3 = sext i16 %a3 to i32 146 %ab4 = zext i16 %a4 to i32 147 %ab5 = zext i16 %a5 to i32 148 %ab6 = zext i16 %a6 to i32 149 %ab7 = zext i16 %a7 to i32 150 %r0 = insertelement <8 x i32> undef, i32 %ab0, i32 0 151 %r1 = insertelement <8 x i32> %r0, i32 %ab1, i32 1 152 %r2 = insertelement <8 x i32> %r1, i32 %ab2, i32 2 153 %r3 = insertelement <8 x i32> %r2, i32 %ab3, i32 3 154 %r4 = insertelement <8 x i32> %r3, i32 %ab4, i32 4 155 %r5 = insertelement <8 x i32> %r4, i32 %ab5, i32 5 156 %r6 = insertelement <8 x i32> %r5, i32 %ab6, i32 6 157 %r7 = insertelement <8 x i32> %r6, i32 %ab7, i32 7 158 ret <8 x i32> %r7 159} 160 161define <8 x float> @sitofp_4i32_8i16(<4 x i32> %a, <8 x i16> %b) { 162; CHECK-LABEL: @sitofp_4i32_8i16( 163; CHECK-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float> 164; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 165; CHECK-NEXT: [[TMP3:%.*]] = sitofp <4 x i16> [[TMP2]] to <4 x float> 166; CHECK-NEXT: [[R71:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 167; CHECK-NEXT: ret <8 x float> [[R71]] 168; 169 %a0 = extractelement <4 x i32> %a, i32 0 170 %a1 = extractelement <4 x i32> %a, i32 1 171 %a2 = extractelement <4 x i32> %a, i32 2 172 %a3 = extractelement <4 x i32> %a, i32 3 173 %b0 = extractelement <8 x i16> %b, i32 0 174 %b1 = extractelement <8 x i16> %b, i32 1 175 %b2 = extractelement <8 x i16> %b, i32 2 176 %b3 = extractelement <8 x i16> %b, i32 3 177 %ab0 = sitofp i32 %a0 to float 178 %ab1 = sitofp i32 %a1 to float 179 %ab2 = sitofp i32 %a2 to float 180 %ab3 = sitofp i32 %a3 to float 181 %ab4 = sitofp i16 %b0 to float 182 %ab5 = sitofp i16 %b1 to float 183 %ab6 = sitofp i16 %b2 to float 184 %ab7 = sitofp i16 %b3 to float 185 %r0 = insertelement <8 x float> undef, float %ab0, i32 0 186 %r1 = insertelement <8 x float> %r0, float %ab1, i32 1 187 %r2 = insertelement <8 x float> %r1, float %ab2, i32 2 188 %r3 = insertelement <8 x float> %r2, float %ab3, i32 3 189 %r4 = insertelement <8 x float> %r3, float %ab4, i32 4 190 %r5 = insertelement <8 x float> %r4, float %ab5, i32 5 191 %r6 = insertelement <8 x float> %r5, float %ab6, i32 6 192 %r7 = insertelement <8 x float> %r6, float %ab7, i32 7 193 ret <8 x float> %r7 194} 195 196; Inspired by PR38154 197define <8 x float> @sitofp_uitofp_4i32_8i16_16i8(<4 x i32> %a, <8 x i16> %b, <16 x i8> %c) { 198; CHECK-LABEL: @sitofp_uitofp_4i32_8i16_16i8( 199; CHECK-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float> 200; CHECK-NEXT: [[TMP2:%.*]] = uitofp <4 x i32> [[A]] to <4 x float> 201; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 6, i32 7> 202; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <2 x i32> <i32 0, i32 1> 203; CHECK-NEXT: [[TMP5:%.*]] = sitofp <2 x i16> [[TMP4]] to <2 x float> 204; CHECK-NEXT: [[TMP6:%.*]] = uitofp <2 x i16> [[TMP4]] to <2 x float> 205; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> [[TMP6]], <2 x i32> <i32 0, i32 3> 206; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <16 x i8> [[C:%.*]], <16 x i8> poison, <2 x i32> <i32 0, i32 1> 207; CHECK-NEXT: [[TMP9:%.*]] = sitofp <2 x i8> [[TMP8]] to <2 x float> 208; CHECK-NEXT: [[TMP10:%.*]] = uitofp <2 x i8> [[TMP8]] to <2 x float> 209; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP9]], <2 x float> [[TMP10]], <2 x i32> <i32 0, i32 3> 210; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison> 211; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x float> [[TMP7]], <2 x float> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison> 212; CHECK-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[TMP12]], <8 x float> [[TMP13]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 poison, i32 poison> 213; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <2 x float> [[TMP11]], <2 x float> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison> 214; CHECK-NEXT: [[R71:%.*]] = shufflevector <8 x float> [[R52]], <8 x float> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9> 215; CHECK-NEXT: ret <8 x float> [[R71]] 216; 217 %a0 = extractelement <4 x i32> %a, i32 0 218 %a1 = extractelement <4 x i32> %a, i32 1 219 %a2 = extractelement <4 x i32> %a, i32 2 220 %a3 = extractelement <4 x i32> %a, i32 3 221 %b0 = extractelement <8 x i16> %b, i32 0 222 %b1 = extractelement <8 x i16> %b, i32 1 223 %c0 = extractelement <16 x i8> %c, i32 0 224 %c1 = extractelement <16 x i8> %c, i32 1 225 %ab0 = sitofp i32 %a0 to float 226 %ab1 = sitofp i32 %a1 to float 227 %ab2 = uitofp i32 %a2 to float 228 %ab3 = uitofp i32 %a3 to float 229 %ab4 = sitofp i16 %b0 to float 230 %ab5 = uitofp i16 %b1 to float 231 %ab6 = sitofp i8 %c0 to float 232 %ab7 = uitofp i8 %c1 to float 233 %r0 = insertelement <8 x float> undef, float %ab0, i32 0 234 %r1 = insertelement <8 x float> %r0, float %ab1, i32 1 235 %r2 = insertelement <8 x float> %r1, float %ab2, i32 2 236 %r3 = insertelement <8 x float> %r2, float %ab3, i32 3 237 %r4 = insertelement <8 x float> %r3, float %ab4, i32 4 238 %r5 = insertelement <8 x float> %r4, float %ab5, i32 5 239 %r6 = insertelement <8 x float> %r5, float %ab6, i32 6 240 %r7 = insertelement <8 x float> %r6, float %ab7, i32 7 241 ret <8 x float> %r7 242} 243