xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/X86/PR34635.ll (revision 580210a0c938531ef9fd79f9ffedb93eeb2e66c2)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -mtriple=x86_64-unknown-linux -passes=slp-vectorizer -S -mcpu=corei7 | FileCheck %s
3
4define i32 @main() {
5; CHECK-LABEL: @main(
6; CHECK-NEXT:  bb:
7; CHECK-NEXT:    [[T:%.*]] = alloca <8 x i32>, align 32
8; CHECK-NEXT:    [[T2:%.*]] = alloca i32, align 4
9; CHECK-NEXT:    [[T5:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 1
10; CHECK-NEXT:    [[T6:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 2
11; CHECK-NEXT:    [[T7:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 3
12; CHECK-NEXT:    [[T8:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 4
13; CHECK-NEXT:    [[T9:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 6
14; CHECK-NEXT:    [[T10:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 5
15; CHECK-NEXT:    [[T11:%.*]] = getelementptr inbounds [8 x i32], ptr [[T]], i64 0, i64 7
16; CHECK-NEXT:    store <8 x i32> <i32 -221320154, i32 -756426931, i32 563883532, i32 382683935, i32 144890241, i32 -1052877364, i32 -1052877364, i32 -1016007675>, ptr [[T]], align 32
17; CHECK-NEXT:    [[T13:%.*]] = load i32, ptr [[T]], align 32
18; CHECK-NEXT:    [[T14:%.*]] = load i32, ptr [[T5]], align 4
19; CHECK-NEXT:    [[T15:%.*]] = icmp slt i32 [[T14]], [[T13]]
20; CHECK-NEXT:    [[T16:%.*]] = select i1 [[T15]], i32 [[T14]], i32 [[T13]]
21; CHECK-NEXT:    [[T17:%.*]] = zext i1 [[T15]] to i32
22; CHECK-NEXT:    [[T18:%.*]] = load i32, ptr [[T6]], align 8
23; CHECK-NEXT:    [[T19:%.*]] = icmp slt i32 [[T18]], [[T16]]
24; CHECK-NEXT:    [[T20:%.*]] = select i1 [[T19]], i32 [[T18]], i32 [[T16]]
25; CHECK-NEXT:    [[T21:%.*]] = select i1 [[T19]], i32 2, i32 [[T16]]
26; CHECK-NEXT:    [[T22:%.*]] = load i32, ptr [[T7]], align 4
27; CHECK-NEXT:    [[T23:%.*]] = icmp slt i32 [[T22]], [[T20]]
28; CHECK-NEXT:    [[T24:%.*]] = select i1 [[T23]], i32 [[T22]], i32 [[T20]]
29; CHECK-NEXT:    [[T25:%.*]] = select i1 [[T23]], i32 3, i32 [[T21]]
30; CHECK-NEXT:    [[T26:%.*]] = load i32, ptr [[T8]], align 16
31; CHECK-NEXT:    [[T27:%.*]] = icmp slt i32 [[T26]], [[T24]]
32; CHECK-NEXT:    [[T28:%.*]] = select i1 [[T27]], i32 [[T26]], i32 [[T24]]
33; CHECK-NEXT:    [[T29:%.*]] = select i1 [[T27]], i32 4, i32 [[T25]]
34; CHECK-NEXT:    [[T30:%.*]] = load i32, ptr [[T10]], align 4
35; CHECK-NEXT:    [[T31:%.*]] = icmp slt i32 [[T30]], [[T28]]
36; CHECK-NEXT:    [[T32:%.*]] = select i1 [[T31]], i32 [[T30]], i32 [[T28]]
37; CHECK-NEXT:    [[T33:%.*]] = select i1 [[T31]], i32 5, i32 [[T29]]
38; CHECK-NEXT:    [[T34:%.*]] = load i32, ptr [[T9]], align 8
39; CHECK-NEXT:    [[T35:%.*]] = icmp slt i32 [[T34]], [[T32]]
40; CHECK-NEXT:    [[T36:%.*]] = select i1 [[T35]], i32 [[T34]], i32 [[T32]]
41; CHECK-NEXT:    [[T37:%.*]] = select i1 [[T35]], i32 6, i32 [[T33]]
42; CHECK-NEXT:    [[T38:%.*]] = load i32, ptr [[T11]], align 4
43; CHECK-NEXT:    [[T39:%.*]] = icmp slt i32 [[T38]], [[T36]]
44; CHECK-NEXT:    [[T40:%.*]] = select i1 [[T39]], i32 7, i32 [[T37]]
45; CHECK-NEXT:    store i32 [[T40]], ptr [[T2]], align 4
46; CHECK-NEXT:    ret i32 0
47;
48bb:
49  %t = alloca <8 x i32>, align 32
50  %t2 = alloca i32, align 4
51  %t5 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 1
52  %t6 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 2
53  %t7 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 3
54  %t8 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 4
55  %t9 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 6
56  %t10 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 5
57  %t11 = getelementptr inbounds [8 x i32], ptr %t, i64 0, i64 7
58  store <8 x i32> <i32 -221320154, i32 -756426931, i32 563883532, i32 382683935, i32 144890241, i32 -1052877364, i32 -1052877364, i32 -1016007675>, ptr %t, align 32
59  %t13 = load i32, ptr %t, align 32
60  %t14 = load i32, ptr %t5, align 4
61  %t15 = icmp slt i32 %t14, %t13
62  %t16 = select i1 %t15, i32 %t14, i32 %t13
63  %t17 = zext i1 %t15 to i32
64  %t18 = load i32, ptr %t6, align 8
65  %t19 = icmp slt i32 %t18, %t16
66  %t20 = select i1 %t19, i32 %t18, i32 %t16
67  %t21 = select i1 %t19, i32 2, i32 %t16
68  %t22 = load i32, ptr %t7, align 4
69  %t23 = icmp slt i32 %t22, %t20
70  %t24 = select i1 %t23, i32 %t22, i32 %t20
71  %t25 = select i1 %t23, i32 3, i32 %t21
72  %t26 = load i32, ptr %t8, align 16
73  %t27 = icmp slt i32 %t26, %t24
74  %t28 = select i1 %t27, i32 %t26, i32 %t24
75  %t29 = select i1 %t27, i32 4, i32 %t25
76  %t30 = load i32, ptr %t10, align 4
77  %t31 = icmp slt i32 %t30, %t28
78  %t32 = select i1 %t31, i32 %t30, i32 %t28
79  %t33 = select i1 %t31, i32 5, i32 %t29
80  %t34 = load i32, ptr %t9, align 8
81  %t35 = icmp slt i32 %t34, %t32
82  %t36 = select i1 %t35, i32 %t34, i32 %t32
83  %t37 = select i1 %t35, i32 6, i32 %t33
84  %t38 = load i32, ptr %t11, align 4
85  %t39 = icmp slt i32 %t38, %t36
86  %t40 = select i1 %t39, i32 7, i32 %t37
87  store i32 %t40, ptr %t2, align 4
88  ret i32 0
89}
90