xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/RISCV/struct-gep.ll (revision c27a0b21c5782d61c3c3125571239d08085565da)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v \
3; RUN: -riscv-v-slp-max-vf=0 -S | FileCheck %s
4
5; This shouldn't be vectorized as the extra address computation required for the
6; vector store make it unprofitable (vle/vse don't have an offset in their
7; addressing modes)
8
9%struct.2i32 = type { i32, i32 }
10
11define void @splat_store_v2i32(ptr %dest, i64 %i) {
12; CHECK-LABEL: @splat_store_v2i32(
13; CHECK-NEXT:  entry:
14; CHECK-NEXT:    [[P1:%.*]] = getelementptr [[STRUCT_2I32:%.*]], ptr [[DEST:%.*]], i64 [[I:%.*]], i32 0
15; CHECK-NEXT:    store i32 1, ptr [[P1]], align 4
16; CHECK-NEXT:    [[P2:%.*]] = getelementptr [[STRUCT_2I32]], ptr [[DEST]], i64 [[I]], i32 1
17; CHECK-NEXT:    store i32 1, ptr [[P2]], align 4
18; CHECK-NEXT:    ret void
19;
20entry:
21  %p1 = getelementptr %struct.2i32, ptr %dest, i64 %i, i32 0
22  store i32 1, ptr %p1
23  %p2 = getelementptr %struct.2i32, ptr %dest, i64 %i, i32 1
24  store i32 1, ptr %p2
25  ret void
26}
27
28