xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/RISCV/minbw-with-and-and-scalar-trunc.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr=+v < %s | FileCheck %s
3@c = global [12 x i64] zeroinitializer
4
5; FIXME: after minbitwidth analysis and i32 conv.., 65535 is transformed to
6; and <4 x i16> , -1, which must be dropped.
7; FIXME: need to adjust the cost of the final transformation, since the user is
8; just a trunc to i16 (it must be free).
9define i16 @test() {
10; CHECK-LABEL: define i16 @test(
11; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
12; CHECK-NEXT:  entry:
13; CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i64> @llvm.experimental.vp.strided.load.v4i64.p0.i64(ptr align 8 @c, i64 24, <4 x i1> splat (i1 true), i32 4)
14; CHECK-NEXT:    [[TMP1:%.*]] = trunc <4 x i64> [[TMP0]] to <4 x i16>
15; CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i16> [[TMP1]], splat (i16 -1)
16; CHECK-NEXT:    [[TMP4:%.*]] = call i16 @llvm.vector.reduce.umax.v4i16(<4 x i16> [[TMP3]])
17; CHECK-NEXT:    [[TMP5:%.*]] = zext i16 [[TMP4]] to i32
18; CHECK-NEXT:    [[T:%.*]] = trunc i32 [[TMP5]] to i16
19; CHECK-NEXT:    ret i16 [[T]]
20;
21entry:
22  %0 = load i64, ptr @c, align 8
23  %conv = trunc i64 %0 to i32
24  %conv3 = and i32 %conv, 65535
25  %conv4 = xor i32 %conv3, 65535
26  %1 = load i64, ptr getelementptr inbounds ([12 x i64], ptr @c, i64 0, i64 3), align 8
27  %conv.1 = trunc i64 %1 to i32
28  %conv3.1 = and i32 %conv.1, 65535
29  %conv4.1 = xor i32 %conv3.1, 65535
30  %.conv4.1 = tail call i32 @llvm.umax.i32(i32 %conv4, i32 %conv4.1)
31  %2 = load i64, ptr getelementptr inbounds ([12 x i64], ptr @c, i64 0, i64 6), align 8
32  %conv.2 = trunc i64 %2 to i32
33  %conv3.2 = and i32 %conv.2, 65535
34  %conv4.2 = xor i32 %conv3.2, 65535
35  %.conv4.2 = tail call i32 @llvm.umax.i32(i32 %.conv4.1, i32 %conv4.2)
36  %3 = load i64, ptr getelementptr inbounds ([12 x i64], ptr @c, i64 0, i64 9), align 8
37  %conv.3 = trunc i64 %3 to i32
38  %conv3.3 = and i32 %conv.3, 65535
39  %conv4.3 = xor i32 %conv3.3, 65535
40  %.conv4.3 = tail call i32 @llvm.umax.i32(i32 %.conv4.2, i32 %conv4.3)
41  %t = trunc i32 %.conv4.3 to i16
42  ret i16 %t
43}
44