1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -mtriple=aarch64 -passes=slp-vectorizer -S -slp-threshold=-100 < %s | FileCheck %s 3 4define i16 @test() { 5; CHECK-LABEL: define i16 @test() { 6; CHECK-NEXT: entry: 7; CHECK-NEXT: [[LNOT:%.*]] = xor i1 true, true 8; CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i16 9; CHECK-NEXT: [[ADD:%.*]] = add nsw i16 0, [[LNOT_EXT]] 10; CHECK-NEXT: [[LNOT5:%.*]] = xor i1 true, true 11; CHECK-NEXT: [[LNOT_EXT6:%.*]] = zext i1 [[LNOT5]] to i16 12; CHECK-NEXT: [[ADD7:%.*]] = add nsw i16 [[ADD]], [[LNOT_EXT6]] 13; CHECK-NEXT: ret i16 [[ADD7]] 14; 15entry: 16 %conv = sext i16 1 to i32 17 %cmp = icmp eq i32 %conv, 1 18 %lnot = xor i1 %cmp, true 19 %lnot.ext = zext i1 %lnot to i16 20 %add = add nsw i16 0, %lnot.ext 21 %conv2 = sext i16 1 to i32 22 %cmp3 = icmp eq i32 %conv2, 1 23 %lnot5 = xor i1 %cmp3, true 24 %lnot.ext6 = zext i1 %lnot5 to i16 25 %add7 = add nsw i16 %add, %lnot.ext6 26 ret i16 %add7 27} 28