1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=slp-vectorizer -slp-threshold=-2 -S -pass-remarks-output=%t < %s | FileCheck %s 3; RUN: cat %t | FileCheck -check-prefix=YAML %s 4 5 6; FIXME: The threshold is changed to keep this test case a bit smaller. 7; The AArch64 cost model should not give such high costs to select statements. 8 9target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 10target triple = "aarch64--linux" 11 12; YAML: --- !Passed 13; YAML-NEXT: Pass: slp-vectorizer 14; YAML-NEXT: Name: VectorizedHorizontalReduction 15; YAML-NEXT: Function: test_select 16; YAML-NEXT: Args: 17; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost ' 18; YAML-NEXT: - Cost: '-19' 19; YAML-NEXT: - String: ' and with tree size ' 20; YAML-NEXT: - TreeSize: '8' 21 22define i32 @test_select(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h) { 23; CHECK-LABEL: @test_select( 24; CHECK-NEXT: entry: 25; CHECK-NEXT: [[CMP_22:%.*]] = icmp sgt i32 [[H:%.*]], 0 26; CHECK-NEXT: br i1 [[CMP_22]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] 27; CHECK: for.body.lr.ph: 28; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64 29; CHECK-NEXT: br label [[FOR_BODY:%.*]] 30; CHECK: for.body: 31; CHECK-NEXT: [[S_026:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[FOR_BODY]] ] 32; CHECK-NEXT: [[J_025:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ] 33; CHECK-NEXT: [[P2_024:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR29:%.*]], [[FOR_BODY]] ] 34; CHECK-NEXT: [[P1_023:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[FOR_BODY]] ] 35; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P1_023]], align 4 36; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[P2_024]], align 4 37; CHECK-NEXT: [[TMP2:%.*]] = sub nsw <4 x i32> [[TMP0]], [[TMP1]] 38; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <4 x i32> [[TMP2]], zeroinitializer 39; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP2]] 40; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP2]] 41; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]]) 42; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP6]], [[S_026]] 43; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i32, ptr [[P1_023]], i64 [[IDX_EXT]] 44; CHECK-NEXT: [[ADD_PTR29]] = getelementptr inbounds i32, ptr [[P2_024]], i64 [[IDX_EXT]] 45; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_025]], 1 46; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[H]] 47; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]] 48; CHECK: for.end.loopexit: 49; CHECK-NEXT: br label [[FOR_END]] 50; CHECK: for.end: 51; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ] 52; CHECK-NEXT: ret i32 [[S_0_LCSSA]] 53; 54entry: 55 %cmp.22 = icmp sgt i32 %h, 0 56 br i1 %cmp.22, label %for.body.lr.ph, label %for.end 57 58for.body.lr.ph: ; preds = %entry 59 %idx.ext = sext i32 %lx to i64 60 br label %for.body 61 62for.body: ; preds = %for.body, %for.body.lr.ph 63 %s.026 = phi i32 [ 0, %for.body.lr.ph ], [ %add27, %for.body ] 64 %j.025 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] 65 %p2.024 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr29, %for.body ] 66 %p1.023 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %for.body ] 67 %0 = load i32, ptr %p1.023, align 4 68 %1 = load i32, ptr %p2.024, align 4 69 %sub = sub nsw i32 %0, %1 70 %cmp2 = icmp slt i32 %sub, 0 71 %sub3 = sub nsw i32 0, %sub 72 %sub3.sub = select i1 %cmp2, i32 %sub3, i32 %sub 73 %add = add nsw i32 %sub3.sub, %s.026 74 %arrayidx4 = getelementptr inbounds i32, ptr %p1.023, i64 1 75 %2 = load i32, ptr %arrayidx4, align 4 76 %arrayidx5 = getelementptr inbounds i32, ptr %p2.024, i64 1 77 %3 = load i32, ptr %arrayidx5, align 4 78 %sub6 = sub nsw i32 %2, %3 79 %cmp7 = icmp slt i32 %sub6, 0 80 %sub9 = sub nsw i32 0, %sub6 81 %v.1 = select i1 %cmp7, i32 %sub9, i32 %sub6 82 %add11 = add nsw i32 %add, %v.1 83 %arrayidx12 = getelementptr inbounds i32, ptr %p1.023, i64 2 84 %4 = load i32, ptr %arrayidx12, align 4 85 %arrayidx13 = getelementptr inbounds i32, ptr %p2.024, i64 2 86 %5 = load i32, ptr %arrayidx13, align 4 87 %sub14 = sub nsw i32 %4, %5 88 %cmp15 = icmp slt i32 %sub14, 0 89 %sub17 = sub nsw i32 0, %sub14 90 %sub17.sub14 = select i1 %cmp15, i32 %sub17, i32 %sub14 91 %add19 = add nsw i32 %add11, %sub17.sub14 92 %arrayidx20 = getelementptr inbounds i32, ptr %p1.023, i64 3 93 %6 = load i32, ptr %arrayidx20, align 4 94 %arrayidx21 = getelementptr inbounds i32, ptr %p2.024, i64 3 95 %7 = load i32, ptr %arrayidx21, align 4 96 %sub22 = sub nsw i32 %6, %7 97 %cmp23 = icmp slt i32 %sub22, 0 98 %sub25 = sub nsw i32 0, %sub22 99 %v.3 = select i1 %cmp23, i32 %sub25, i32 %sub22 100 %add27 = add nsw i32 %add19, %v.3 101 %add.ptr = getelementptr inbounds i32, ptr %p1.023, i64 %idx.ext 102 %add.ptr29 = getelementptr inbounds i32, ptr %p2.024, i64 %idx.ext 103 %inc = add nuw nsw i32 %j.025, 1 104 %exitcond = icmp eq i32 %inc, %h 105 br i1 %exitcond, label %for.end.loopexit, label %for.body 106 107for.end.loopexit: ; preds = %for.body 108 br label %for.end 109 110for.end: ; preds = %for.end.loopexit, %entry 111 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add27, %for.end.loopexit ] 112 ret i32 %s.0.lcssa 113} 114 115;; Check whether SLP can find a reduction phi whose incoming blocks are not 116;; the same as the block containing the phi. 117;; 118;; Came from code like, 119;; 120;; int s = 0; 121;; for (int j = 0; j < h; j++) { 122;; s += p1ptr p2[0] 123;; s += p1ptr p2[1]; 124;; s += p1ptr p2[2]; 125;; s += p1ptr p2[3]; 126;; if (s >= lim) 127;; break; 128;; p1 += lx; 129;; p2 += lx; 130;; } 131define i32 @reduction_with_br(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) { 132; YAML: --- !Passed 133; YAML-NEXT: Pass: slp-vectorizer 134; YAML-NEXT: Name: VectorizedHorizontalReduction 135; YAML-NEXT: Function: reduction_with_br 136; YAML-NEXT: Args: 137; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost ' 138; YAML-NEXT: - Cost: '-10' 139; YAML-NEXT: - String: ' and with tree size ' 140; YAML-NEXT: - TreeSize: '3' 141; CHECK-LABEL: @reduction_with_br( 142; CHECK-NEXT: entry: 143; CHECK-NEXT: [[CMP_16:%.*]] = icmp sgt i32 [[H:%.*]], 0 144; CHECK-NEXT: br i1 [[CMP_16]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] 145; CHECK: for.body.lr.ph: 146; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64 147; CHECK-NEXT: br label [[FOR_BODY:%.*]] 148; CHECK: for.body: 149; CHECK-NEXT: [[S_020:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END:%.*]] ] 150; CHECK-NEXT: [[J_019:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END]] ] 151; CHECK-NEXT: [[P2_018:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR16:%.*]], [[IF_END]] ] 152; CHECK-NEXT: [[P1_017:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END]] ] 153; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P1_017]], align 4 154; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[P2_018]], align 4 155; CHECK-NEXT: [[TMP2:%.*]] = mul nsw <4 x i32> [[TMP1]], [[TMP0]] 156; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]]) 157; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP3]], [[S_020]] 158; CHECK-NEXT: [[CMP14:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]] 159; CHECK-NEXT: br i1 [[CMP14]], label [[IF_END]], label [[FOR_END_LOOPEXIT:%.*]] 160; CHECK: if.end: 161; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i32, ptr [[P1_017]], i64 [[IDX_EXT]] 162; CHECK-NEXT: [[ADD_PTR16]] = getelementptr inbounds i32, ptr [[P2_018]], i64 [[IDX_EXT]] 163; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_019]], 1 164; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]] 165; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]] 166; CHECK: for.end.loopexit: 167; CHECK-NEXT: br label [[FOR_END]] 168; CHECK: for.end: 169; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ] 170; CHECK-NEXT: ret i32 [[S_1]] 171; 172entry: 173 %cmp.16 = icmp sgt i32 %h, 0 174 br i1 %cmp.16, label %for.body.lr.ph, label %for.end 175 176for.body.lr.ph: ; preds = %entry 177 %idx.ext = sext i32 %lx to i64 178 br label %for.body 179 180for.body: ; preds = %for.body.lr.ph, %if.end 181 %s.020 = phi i32 [ 0, %for.body.lr.ph ], [ %add13, %if.end ] 182 %j.019 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end ] 183 %p2.018 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr16, %if.end ] 184 %p1.017 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end ] 185 %0 = load i32, ptr %p1.017, align 4 186 %1 = load i32, ptr %p2.018, align 4 187 %mul = mul nsw i32 %1, %0 188 %add = add nsw i32 %mul, %s.020 189 %arrayidx2 = getelementptr inbounds i32, ptr %p1.017, i64 1 190 %2 = load i32, ptr %arrayidx2, align 4 191 %arrayidx3 = getelementptr inbounds i32, ptr %p2.018, i64 1 192 %3 = load i32, ptr %arrayidx3, align 4 193 %mul4 = mul nsw i32 %3, %2 194 %add5 = add nsw i32 %add, %mul4 195 %arrayidx6 = getelementptr inbounds i32, ptr %p1.017, i64 2 196 %4 = load i32, ptr %arrayidx6, align 4 197 %arrayidx7 = getelementptr inbounds i32, ptr %p2.018, i64 2 198 %5 = load i32, ptr %arrayidx7, align 4 199 %mul8 = mul nsw i32 %5, %4 200 %add9 = add nsw i32 %add5, %mul8 201 %arrayidx10 = getelementptr inbounds i32, ptr %p1.017, i64 3 202 %6 = load i32, ptr %arrayidx10, align 4 203 %arrayidx11 = getelementptr inbounds i32, ptr %p2.018, i64 3 204 %7 = load i32, ptr %arrayidx11, align 4 205 %mul12 = mul nsw i32 %7, %6 206 %add13 = add nsw i32 %add9, %mul12 207 %cmp14 = icmp slt i32 %add13, %lim 208 br i1 %cmp14, label %if.end, label %for.end.loopexit 209 210if.end: ; preds = %for.body 211 %add.ptr = getelementptr inbounds i32, ptr %p1.017, i64 %idx.ext 212 %add.ptr16 = getelementptr inbounds i32, ptr %p2.018, i64 %idx.ext 213 %inc = add nuw nsw i32 %j.019, 1 214 %cmp = icmp slt i32 %inc, %h 215 br i1 %cmp, label %for.body, label %for.end.loopexit 216 217for.end.loopexit: ; preds = %for.body, %if.end 218 br label %for.end 219 220for.end: ; preds = %for.end.loopexit, %entry 221 %s.1 = phi i32 [ 0, %entry ], [ %add13, %for.end.loopexit ] 222 ret i32 %s.1 223} 224 225; YAML: --- !Passed 226; YAML-NEXT: Pass: slp-vectorizer 227; YAML-NEXT: Name: VectorizedHorizontalReduction 228; YAML-NEXT: Function: test_unrolled_select 229; YAML-NEXT: Args: 230; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost ' 231; YAML-NEXT: - Cost: '-41' 232; YAML-NEXT: - String: ' and with tree size ' 233; YAML-NEXT: - TreeSize: '10' 234 235define i32 @test_unrolled_select(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) #0 { 236; CHECK-LABEL: @test_unrolled_select( 237; CHECK-NEXT: entry: 238; CHECK-NEXT: [[CMP_43:%.*]] = icmp sgt i32 [[H:%.*]], 0 239; CHECK-NEXT: br i1 [[CMP_43]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] 240; CHECK: for.body.lr.ph: 241; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64 242; CHECK-NEXT: br label [[FOR_BODY:%.*]] 243; CHECK: for.body: 244; CHECK-NEXT: [[S_047:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END_86:%.*]] ] 245; CHECK-NEXT: [[J_046:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END_86]] ] 246; CHECK-NEXT: [[P2_045:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR88:%.*]], [[IF_END_86]] ] 247; CHECK-NEXT: [[P1_044:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END_86]] ] 248; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[P1_044]], align 1 249; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> 250; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P2_045]], align 1 251; CHECK-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16> 252; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i16> [[TMP1]], [[TMP3]] 253; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i16> [[TMP4]] to <8 x i32> 254; CHECK-NEXT: [[TMP6:%.*]] = icmp slt <8 x i32> [[TMP5]], zeroinitializer 255; CHECK-NEXT: [[TMP7:%.*]] = sub <8 x i16> zeroinitializer, [[TMP4]] 256; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP6]], <8 x i16> [[TMP7]], <8 x i16> [[TMP4]] 257; CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[TMP8]] to <8 x i32> 258; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[TMP9]]) 259; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP10]], [[S_047]] 260; CHECK-NEXT: [[CMP83:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]] 261; CHECK-NEXT: br i1 [[CMP83]], label [[IF_END_86]], label [[FOR_END_LOOPEXIT:%.*]] 262; CHECK: if.end.86: 263; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr [[P1_044]], i64 [[IDX_EXT]] 264; CHECK-NEXT: [[ADD_PTR88]] = getelementptr inbounds i8, ptr [[P2_045]], i64 [[IDX_EXT]] 265; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_046]], 1 266; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]] 267; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]] 268; CHECK: for.end.loopexit: 269; CHECK-NEXT: br label [[FOR_END]] 270; CHECK: for.end: 271; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ] 272; CHECK-NEXT: ret i32 [[S_1]] 273; 274entry: 275 %cmp.43 = icmp sgt i32 %h, 0 276 br i1 %cmp.43, label %for.body.lr.ph, label %for.end 277 278for.body.lr.ph: ; preds = %entry 279 %idx.ext = sext i32 %lx to i64 280 br label %for.body 281 282for.body: ; preds = %for.body.lr.ph, %if.end.86 283 %s.047 = phi i32 [ 0, %for.body.lr.ph ], [ %add82, %if.end.86 ] 284 %j.046 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end.86 ] 285 %p2.045 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr88, %if.end.86 ] 286 %p1.044 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end.86 ] 287 %0 = load i8, ptr %p1.044, align 1 288 %conv = zext i8 %0 to i32 289 %1 = load i8, ptr %p2.045, align 1 290 %conv2 = zext i8 %1 to i32 291 %sub = sub nsw i32 %conv, %conv2 292 %cmp3 = icmp slt i32 %sub, 0 293 %sub5 = sub nsw i32 0, %sub 294 %sub5.sub = select i1 %cmp3, i32 %sub5, i32 %sub 295 %add = add nsw i32 %sub5.sub, %s.047 296 %arrayidx6 = getelementptr inbounds i8, ptr %p1.044, i64 1 297 %2 = load i8, ptr %arrayidx6, align 1 298 %conv7 = zext i8 %2 to i32 299 %arrayidx8 = getelementptr inbounds i8, ptr %p2.045, i64 1 300 %3 = load i8, ptr %arrayidx8, align 1 301 %conv9 = zext i8 %3 to i32 302 %sub10 = sub nsw i32 %conv7, %conv9 303 %cmp11 = icmp slt i32 %sub10, 0 304 %sub14 = sub nsw i32 0, %sub10 305 %v.1 = select i1 %cmp11, i32 %sub14, i32 %sub10 306 %add16 = add nsw i32 %add, %v.1 307 %arrayidx17 = getelementptr inbounds i8, ptr %p1.044, i64 2 308 %4 = load i8, ptr %arrayidx17, align 1 309 %conv18 = zext i8 %4 to i32 310 %arrayidx19 = getelementptr inbounds i8, ptr %p2.045, i64 2 311 %5 = load i8, ptr %arrayidx19, align 1 312 %conv20 = zext i8 %5 to i32 313 %sub21 = sub nsw i32 %conv18, %conv20 314 %cmp22 = icmp slt i32 %sub21, 0 315 %sub25 = sub nsw i32 0, %sub21 316 %sub25.sub21 = select i1 %cmp22, i32 %sub25, i32 %sub21 317 %add27 = add nsw i32 %add16, %sub25.sub21 318 %arrayidx28 = getelementptr inbounds i8, ptr %p1.044, i64 3 319 %6 = load i8, ptr %arrayidx28, align 1 320 %conv29 = zext i8 %6 to i32 321 %arrayidx30 = getelementptr inbounds i8, ptr %p2.045, i64 3 322 %7 = load i8, ptr %arrayidx30, align 1 323 %conv31 = zext i8 %7 to i32 324 %sub32 = sub nsw i32 %conv29, %conv31 325 %cmp33 = icmp slt i32 %sub32, 0 326 %sub36 = sub nsw i32 0, %sub32 327 %v.3 = select i1 %cmp33, i32 %sub36, i32 %sub32 328 %add38 = add nsw i32 %add27, %v.3 329 %arrayidx39 = getelementptr inbounds i8, ptr %p1.044, i64 4 330 %8 = load i8, ptr %arrayidx39, align 1 331 %conv40 = zext i8 %8 to i32 332 %arrayidx41 = getelementptr inbounds i8, ptr %p2.045, i64 4 333 %9 = load i8, ptr %arrayidx41, align 1 334 %conv42 = zext i8 %9 to i32 335 %sub43 = sub nsw i32 %conv40, %conv42 336 %cmp44 = icmp slt i32 %sub43, 0 337 %sub47 = sub nsw i32 0, %sub43 338 %sub47.sub43 = select i1 %cmp44, i32 %sub47, i32 %sub43 339 %add49 = add nsw i32 %add38, %sub47.sub43 340 %arrayidx50 = getelementptr inbounds i8, ptr %p1.044, i64 5 341 %10 = load i8, ptr %arrayidx50, align 1 342 %conv51 = zext i8 %10 to i32 343 %arrayidx52 = getelementptr inbounds i8, ptr %p2.045, i64 5 344 %11 = load i8, ptr %arrayidx52, align 1 345 %conv53 = zext i8 %11 to i32 346 %sub54 = sub nsw i32 %conv51, %conv53 347 %cmp55 = icmp slt i32 %sub54, 0 348 %sub58 = sub nsw i32 0, %sub54 349 %v.5 = select i1 %cmp55, i32 %sub58, i32 %sub54 350 %add60 = add nsw i32 %add49, %v.5 351 %arrayidx61 = getelementptr inbounds i8, ptr %p1.044, i64 6 352 %12 = load i8, ptr %arrayidx61, align 1 353 %conv62 = zext i8 %12 to i32 354 %arrayidx63 = getelementptr inbounds i8, ptr %p2.045, i64 6 355 %13 = load i8, ptr %arrayidx63, align 1 356 %conv64 = zext i8 %13 to i32 357 %sub65 = sub nsw i32 %conv62, %conv64 358 %cmp66 = icmp slt i32 %sub65, 0 359 %sub69 = sub nsw i32 0, %sub65 360 %sub69.sub65 = select i1 %cmp66, i32 %sub69, i32 %sub65 361 %add71 = add nsw i32 %add60, %sub69.sub65 362 %arrayidx72 = getelementptr inbounds i8, ptr %p1.044, i64 7 363 %14 = load i8, ptr %arrayidx72, align 1 364 %conv73 = zext i8 %14 to i32 365 %arrayidx74 = getelementptr inbounds i8, ptr %p2.045, i64 7 366 %15 = load i8, ptr %arrayidx74, align 1 367 %conv75 = zext i8 %15 to i32 368 %sub76 = sub nsw i32 %conv73, %conv75 369 %cmp77 = icmp slt i32 %sub76, 0 370 %sub80 = sub nsw i32 0, %sub76 371 %v.7 = select i1 %cmp77, i32 %sub80, i32 %sub76 372 %add82 = add nsw i32 %add71, %v.7 373 %cmp83 = icmp slt i32 %add82, %lim 374 br i1 %cmp83, label %if.end.86, label %for.end.loopexit 375 376if.end.86: ; preds = %for.body 377 %add.ptr = getelementptr inbounds i8, ptr %p1.044, i64 %idx.ext 378 %add.ptr88 = getelementptr inbounds i8, ptr %p2.045, i64 %idx.ext 379 %inc = add nuw nsw i32 %j.046, 1 380 %cmp = icmp slt i32 %inc, %h 381 br i1 %cmp, label %for.body, label %for.end.loopexit 382 383for.end.loopexit: ; preds = %for.body, %if.end.86 384 br label %for.end 385 386for.end: ; preds = %for.end.loopexit, %entry 387 %s.1 = phi i32 [ 0, %entry ], [ %add82, %for.end.loopexit ] 388 ret i32 %s.1 389} 390 391