1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt < %s -passes=reassociate -S | FileCheck %s 3define i32 @nsw_preserve_nonnegative(ptr %ptr0, ptr %ptr1, ptr %ptr2) { 4; CHECK-LABEL: define i32 @nsw_preserve_nonnegative( 5; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { 6; CHECK-NEXT: [[V0:%.*]] = load i32, ptr [[PTR0]], align 4, !range [[RNG0:![0-9]+]] 7; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR1]], align 4, !range [[RNG0]] 8; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[PTR2]], align 4, !range [[RNG0]] 9; CHECK-NEXT: [[ADD0:%.*]] = add nsw i32 [[V1]], [[V0]] 10; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD0]], [[V2]] 11; CHECK-NEXT: ret i32 [[ADD1]] 12; 13 %v0 = load i32, ptr %ptr0, !range !1 14 %v1 = load i32, ptr %ptr1, !range !1 15 %v2 = load i32, ptr %ptr2, !range !1 16 %add0 = add nsw i32 %v1, %v2 17 %add1 = add nsw i32 %add0, %v0 18 ret i32 %add1 19} 20 21define i32 @nsw_preserve_nuw_nsw(ptr %ptr0, ptr %ptr1, ptr %ptr2) { 22; CHECK-LABEL: define i32 @nsw_preserve_nuw_nsw( 23; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { 24; CHECK-NEXT: [[V0:%.*]] = load i32, ptr [[PTR0]], align 4 25; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR1]], align 4 26; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[PTR2]], align 4 27; CHECK-NEXT: [[ADD0:%.*]] = add nuw nsw i32 [[V1]], [[V0]] 28; CHECK-NEXT: [[ADD1:%.*]] = add nuw nsw i32 [[ADD0]], [[V2]] 29; CHECK-NEXT: ret i32 [[ADD1]] 30; 31 %v0 = load i32, ptr %ptr0 32 %v1 = load i32, ptr %ptr1 33 %v2 = load i32, ptr %ptr2 34 %add0 = add nuw nsw i32 %v1, %v2 35 %add1 = add nuw nsw i32 %add0, %v0 36 ret i32 %add1 37} 38 39define i32 @nsw_dont_preserve_negative(ptr %ptr0, ptr %ptr1, ptr %ptr2) { 40; CHECK-LABEL: define i32 @nsw_dont_preserve_negative( 41; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { 42; CHECK-NEXT: [[V0:%.*]] = load i32, ptr [[PTR0]], align 4 43; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR1]], align 4, !range [[RNG0]] 44; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[PTR2]], align 4, !range [[RNG0]] 45; CHECK-NEXT: [[ADD0:%.*]] = add i32 [[V1]], [[V0]] 46; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[ADD0]], [[V2]] 47; CHECK-NEXT: ret i32 [[ADD1]] 48; 49 %v0 = load i32, ptr %ptr0 50 %v1 = load i32, ptr %ptr1, !range !1 51 %v2 = load i32, ptr %ptr2, !range !1 52 %add0 = add nsw i32 %v1, %v2 53 %add1 = add nsw i32 %add0, %v0 54 ret i32 %add1 55} 56 57define i32 @nsw_nopreserve_notallnsw(ptr %ptr0, ptr %ptr1, ptr %ptr2) { 58; CHECK-LABEL: define i32 @nsw_nopreserve_notallnsw( 59; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { 60; CHECK-NEXT: [[V0:%.*]] = load i32, ptr [[PTR0]], align 4, !range [[RNG0:![0-9]+]] 61; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR1]], align 4, !range [[RNG0]] 62; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[PTR2]], align 4, !range [[RNG0]] 63; CHECK-NEXT: [[ADD0:%.*]] = add i32 [[V1]], [[V0]] 64; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[ADD0]], [[V2]] 65; CHECK-NEXT: ret i32 [[ADD1]] 66; 67 %v0 = load i32, ptr %ptr0, !range !1 68 %v1 = load i32, ptr %ptr1, !range !1 69 %v2 = load i32, ptr %ptr2, !range !1 70 %add0 = add nsw i32 %v1, %v2 71 %add1 = add i32 %add0, %v0 72 ret i32 %add1 73} 74 75; Positive 32 bit integers 76!1 = !{i32 0, i32 2147483648} 77;. 78; CHECK: [[RNG0]] = !{i32 0, i32 -2147483648} 79;. 80