xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll (revision 1c55cc600e99a963233d6f467373c8f16a1b8826)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; REQUIRES: powerpc-registered-target
3; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
4
5target datalayout = "e-m:e-i64:64-n32:64"
6target triple = "powerpc64le-unknown-linux-gnu"
7
8define dso_local i64 @func(i64 %blah, i64 %limit) #0 {
9; CHECK-LABEL: @func(
10; CHECK-NEXT:  entry:
11; CHECK-NEXT:    ret i64 undef
12;
13entry:
14  %blah.addr = alloca i64, align 8
15  %limit.addr = alloca i64, align 8
16  %k = alloca i32, align 4
17  %g = alloca i64, align 8
18  %i = alloca i64, align 8
19  store i64 %blah, ptr %blah.addr, align 8
20  store i64 %limit, ptr %limit.addr, align 8
21  store i32 1, ptr %k, align 4
22  store i64 0, ptr %i, align 8
23  br label %for.cond
24
25for.cond:
26  %0 = load i64, ptr %i, align 8
27  %1 = load i64, ptr %limit.addr, align 8
28  %cmp = icmp ult i64 %0, %1
29  br i1 %cmp, label %for.body, label %for.cond.cleanup
30
31for.cond.cleanup:
32  %2 = load i64, ptr %g, align 8
33  ret i64 %2
34
35for.body:
36  %3 = load i64, ptr %blah.addr, align 8
37  %4 = load i32, ptr %k, align 4
38  %conv = zext i32 %4 to i64
39  %and = and i64 %conv, %3
40  %conv1 = trunc i64 %and to i32
41  store i32 %conv1, ptr %k, align 4
42  %5 = load i32, ptr %k, align 4
43  %conv2 = zext i32 %5 to i64
44  %6 = load i64, ptr %g, align 8
45  %add = add i64 %6, %conv2
46  store i64 %add, ptr %g, align 8
47  %7 = load i64, ptr %i, align 8
48  %inc = add i64 %7, 1
49  store i64 %inc, ptr %i, align 8
50  br label %for.cond
51}
52
53attributes #0 = { "use-soft-float"="false" }
54