xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/pr39116.ll (revision 75d1a815c35b8863392e4338aa9418a9a43928b9)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s
3
4define zeroext i1 @switch_ob_one_two_cases(i32 %arg) {
5; CHECK-LABEL: @switch_ob_one_two_cases(
6; CHECK-NEXT:  bb:
7; CHECK-NEXT:    [[TMP0:%.*]] = and i32 [[ARG:%.*]], -3
8; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 0
9; CHECK-NEXT:    ret i1 [[TMP1]]
10;
11bb:
12  switch i32 %arg, label %bb1 [
13  i32 0, label %bb2
14  i32 2, label %bb2
15  ]
16
17bb1:
18  br label %bb2
19
20bb2:
21  %i = phi i1 [ false, %bb1 ], [ true, %bb ], [ true, %bb ]
22  ret i1 %i
23}
24
25define zeroext i1 @switch_ob_one_two_cases2(i32 %arg) {
26; CHECK-LABEL: @switch_ob_one_two_cases2(
27; CHECK-NEXT:    [[I:%.*]] = icmp eq i32 [[ARG:%.*]], 7
28; CHECK-NEXT:    [[I1:%.*]] = icmp eq i32 [[ARG]], 11
29; CHECK-NEXT:    [[I2:%.*]] = or i1 [[I]], [[I1]]
30; CHECK-NEXT:    ret i1 [[I2]]
31;
32  %i = icmp eq i32 %arg, 7
33  %i1 = icmp eq i32 %arg, 11
34  %i2 = or i1 %i, %i1
35  ret i1 %i2
36}
37