1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -mtriple=x86_64-- -mcpu=x86-64 -O3 -S < %s | FileCheck %s --check-prefixes=SSE2 3; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v2 -O3 -S < %s | FileCheck %s --check-prefixes=SSE4 4; RUN: opt -mtriple=x86_64-- -mcpu=btver2 -O3 -S < %s | FileCheck %s --check-prefixes=AVX 5; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v3 -O3 -S < %s | FileCheck %s --check-prefixes=AVX 6; RUN: opt -mtriple=x86_64-- -mcpu=x86-64 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=SSE2 7; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v2 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=SSE4 8; RUN: opt -mtriple=x86_64-- -mcpu=btver2 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=AVX 9; RUN: opt -mtriple=x86_64-- -mcpu=x86-64-v3 -passes="default<O3>" -S < %s | FileCheck %s --check-prefixes=AVX 10 11define <4 x double> @PR94546(<4 x double> %a, <4 x double> %b) { 12; SSE2-LABEL: @PR94546( 13; SSE2-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <2 x i32> <i32 0, i32 6> 14; SSE2-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 7> 15; SSE2-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]] 16; SSE2-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 poison, i32 1> 17; SSE2-NEXT: ret <4 x double> [[TMP4]] 18; 19; SSE4-LABEL: @PR94546( 20; SSE4-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <4 x i32> <i32 0, i32 poison, i32 poison, i32 6> 21; SSE4-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <4 x i32> <i32 1, i32 poison, i32 poison, i32 7> 22; SSE4-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]] 23; SSE4-NEXT: ret <4 x double> [[TMP3]] 24; 25; AVX-LABEL: @PR94546( 26; AVX-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B:%.*]], <4 x i32> <i32 0, i32 poison, i32 poison, i32 6> 27; AVX-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <4 x i32> <i32 1, i32 poison, i32 poison, i32 7> 28; AVX-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]] 29; AVX-NEXT: ret <4 x double> [[TMP3]] 30; 31 %vecext = extractelement <4 x double> %a, i32 0 32 %vecext1 = extractelement <4 x double> %a, i32 1 33 %add = fadd double %vecext, %vecext1 34 %vecinit = insertelement <4 x double> poison, double %add, i32 0 35 %vecext2 = extractelement <4 x double> %a, i32 2 36 %vecext3 = extractelement <4 x double> %a, i32 3 37 %add4 = fadd double %vecext2, %vecext3 38 %vecinit5 = insertelement <4 x double> %vecinit, double %add4, i32 1 39 %vecext6 = extractelement <4 x double> %b, i32 0 40 %vecext7 = extractelement <4 x double> %b, i32 1 41 %add8 = fadd double %vecext6, %vecext7 42 %vecinit9 = insertelement <4 x double> %vecinit5, double %add8, i32 2 43 %vecext10 = extractelement <4 x double> %b, i32 2 44 %vecext11 = extractelement <4 x double> %b, i32 3 45 %add12 = fadd double %vecext10, %vecext11 46 %vecinit13 = insertelement <4 x double> %vecinit9, double %add12, i32 3 47 %shuffle = shufflevector <4 x double> %vecinit13, <4 x double> %a, <4 x i32> <i32 0, i32 poison, i32 poison, i32 3> 48 ret <4 x double> %shuffle 49} 50