xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/X86/nancvt.ll (revision 1c55cc600e99a963233d6f467373c8f16a1b8826)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -O3 -S | FileCheck %s
3
4; Compile time conversions of NaNs.
5
6target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
7target triple = "i686-apple-darwin8"
8
9%struct..0anon = type { float }
10%struct..1anon = type { double }
11
12@fnan = constant [3 x i32] [ i32 2143831397, i32 2143831396, i32 2143831398 ]
13@dnan = constant [3 x i64] [ i64 9223235251041752696, i64 9223235251041752697, i64 9223235250773317239 ], align 8
14@fsnan = constant [3 x i32] [ i32 2139637093, i32 2139637092, i32 2139637094 ]
15@dsnan = constant [3 x i64] [ i64 9220983451228067448, i64 9220983451228067449, i64 9220983450959631991 ], align 8
16@.str = internal constant [10 x i8] c"%08x%08x\0A\00"
17@.str1 = internal constant [6 x i8] c"%08x\0A\00"
18
19@var = external global i32
20
21; SNAN becomes QNAN on fptrunc:
22; 2147228864 = 0x7ffc1cc0 : QNAN
23
24define i32 @main() {
25; CHECK-LABEL: @main(
26; CHECK-NEXT:  entry:
27; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
28; CHECK-NEXT:    store volatile i32 -1610612736, ptr @var, align 4
29; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
30; CHECK-NEXT:    store volatile i32 -2147483648, ptr @var, align 4
31; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
32; CHECK-NEXT:    store volatile i32 -1073741824, ptr @var, align 4
33; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
34; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
35; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
36; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
37; CHECK-NEXT:    store volatile i32 -1610612736, ptr @var, align 4
38; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
39; CHECK-NEXT:    store volatile i32 -2147483648, ptr @var, align 4
40; CHECK-NEXT:    store volatile i32 2147027116, ptr @var, align 4
41; CHECK-NEXT:    store volatile i32 -1073741824, ptr @var, align 4
42; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
43; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
44; CHECK-NEXT:    store volatile i32 2147228864, ptr @var, align 4
45; CHECK-NEXT:    ret i32 undef
46;
47entry:
48  %retval = alloca i32, align 4
49  %i = alloca i32, align 4
50  %uf = alloca %struct..0anon, align 4
51  %ud = alloca %struct..1anon, align 8
52  %"alloca point" = bitcast i32 0 to i32
53  store i32 0, ptr %i, align 4
54  br label %bb23
55
56bb:		; preds = %bb23
57  %t = load i32, ptr %i, align 4
58  %t1 = getelementptr [3 x i32], ptr @fnan, i32 0, i32 %t
59  %t2 = load i32, ptr %t1, align 4
60  store i32 %t2, ptr %uf, align 4
61  %t6 = load float, ptr %uf, align 4
62  %t67 = fpext float %t6 to double
63  store double %t67, ptr %ud, align 8
64  %t11 = load i64, ptr %ud, align 8
65  %t1112 = trunc i64 %t11 to i32
66  %t13 = and i32 %t1112, -1
67  %t16 = load i64, ptr %ud, align 8
68  %.cast = zext i32 32 to i64
69  %t17 = ashr i64 %t16, %.cast
70  %t1718 = trunc i64 %t17 to i32
71  store volatile i32 %t1718, ptr @var
72  store volatile i32 %t13, ptr @var
73  %t21 = load i32, ptr %i, align 4
74  %t22 = add i32 %t21, 1
75  store i32 %t22, ptr %i, align 4
76  br label %bb23
77
78bb23:		; preds = %bb, %entry
79  %t24 = load i32, ptr %i, align 4
80  %t25 = icmp sle i32 %t24, 2
81  %t2526 = zext i1 %t25 to i8
82  %toBool = icmp ne i8 %t2526, 0
83  br i1 %toBool, label %bb, label %bb27
84
85bb27:		; preds = %bb23
86  store i32 0, ptr %i, align 4
87  br label %bb46
88
89bb28:		; preds = %bb46
90  %t29 = load i32, ptr %i, align 4
91  %t30 = getelementptr [3 x i64], ptr @dnan, i32 0, i32 %t29
92  %t31 = load i64, ptr %t30, align 8
93  store i64 %t31, ptr %ud, align 8
94  %t36 = load double, ptr %ud, align 8
95  %t3637 = fptrunc double %t36 to float
96  store float %t3637, ptr %uf, align 4
97  %t41 = load i32, ptr %uf, align 4
98  store volatile i32 %t41, ptr @var
99  %t44 = load i32, ptr %i, align 4
100  %t45 = add i32 %t44, 1
101  store i32 %t45, ptr %i, align 4
102  br label %bb46
103
104bb46:		; preds = %bb28, %bb27
105  %t47 = load i32, ptr %i, align 4
106  %t48 = icmp sle i32 %t47, 2
107  %t4849 = zext i1 %t48 to i8
108  %toBool50 = icmp ne i8 %t4849, 0
109  br i1 %toBool50, label %bb28, label %bb51
110
111bb51:		; preds = %bb46
112  store i32 0, ptr %i, align 4
113  br label %bb78
114
115bb52:		; preds = %bb78
116  %t53 = load i32, ptr %i, align 4
117  %t54 = getelementptr [3 x i32], ptr @fsnan, i32 0, i32 %t53
118  %t55 = load i32, ptr %t54, align 4
119  store i32 %t55, ptr %uf, align 4
120  %t59 = load float, ptr %uf, align 4
121  %t5960 = fpext float %t59 to double
122  store double %t5960, ptr %ud, align 8
123  %t64 = load i64, ptr %ud, align 8
124  %t6465 = trunc i64 %t64 to i32
125  %t66 = and i32 %t6465, -1
126  %t70 = load i64, ptr %ud, align 8
127  %.cast71 = zext i32 32 to i64
128  %t72 = ashr i64 %t70, %.cast71
129  %t7273 = trunc i64 %t72 to i32
130  store volatile i32 %t7273, ptr @var
131  store volatile i32 %t66, ptr @var
132  %t76 = load i32, ptr %i, align 4
133  %t77 = add i32 %t76, 1
134  store i32 %t77, ptr %i, align 4
135  br label %bb78
136
137bb78:		; preds = %bb52, %bb51
138  %t79 = load i32, ptr %i, align 4
139  %t80 = icmp sle i32 %t79, 2
140  %t8081 = zext i1 %t80 to i8
141  %toBool82 = icmp ne i8 %t8081, 0
142  br i1 %toBool82, label %bb52, label %bb83
143
144bb83:		; preds = %bb78
145  store i32 0, ptr %i, align 4
146  br label %bb101
147
148bb84:		; preds = %bb101
149  %t85 = load i32, ptr %i, align 4
150  %t86 = getelementptr [3 x i64], ptr @dsnan, i32 0, i32 %t85
151  %t87 = load i64, ptr %t86, align 8
152  store i64 %t87, ptr %ud, align 8
153  %t91 = load double, ptr %ud, align 8
154  %t9192 = fptrunc double %t91 to float
155  store float %t9192, ptr %uf, align 4
156  %t96 = load i32, ptr %uf, align 4
157  store volatile i32 %t96, ptr @var
158  %t99 = load i32, ptr %i, align 4
159  %t100 = add i32 %t99, 1
160  store i32 %t100, ptr %i, align 4
161  br label %bb101
162
163bb101:		; preds = %bb84, %bb83
164  %t102 = load i32, ptr %i, align 4
165  %t103 = icmp sle i32 %t102, 2
166  %t103104 = zext i1 %t103 to i8
167  %toBool105 = icmp ne i8 %t103104, 0
168  br i1 %toBool105, label %bb84, label %bb106
169
170bb106:		; preds = %bb101
171  br label %return
172
173return:		; preds = %bb106
174  %retval107 = load i32, ptr %retval
175  ret i32 %retval107
176}
177