1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes="default<O3>" -S < %s | FileCheck %s 3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 5target triple = "aarch64-unknown-linux-unknown" 6 7define i128 @__muloti4(i128 %0, i128 %1, ptr nonnull align 4 %2) { 8; CHECK-LABEL: @__muloti4( 9; CHECK-NEXT: Entry: 10; CHECK-NEXT: [[DOTFR:%.*]] = freeze i128 [[TMP1:%.*]] 11; CHECK-NEXT: store i32 0, ptr [[TMP2:%.*]], align 4 12; CHECK-NEXT: [[MUL:%.*]] = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 [[TMP0:%.*]], i128 [[DOTFR]]) 13; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i128 [[TMP0]], 0 14; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i128 [[DOTFR]], -170141183460469231731687303715884105728 15; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP3]], [[TMP4]] 16; CHECK-NEXT: br i1 [[TMP5]], label [[THEN7:%.*]], label [[ELSE2:%.*]] 17; CHECK: Else2: 18; CHECK-NEXT: [[MUL_OV:%.*]] = extractvalue { i128, i1 } [[MUL]], 1 19; CHECK-NEXT: br i1 [[MUL_OV]], label [[THEN7]], label [[BLOCK9:%.*]] 20; CHECK: Then7: 21; CHECK-NEXT: store i32 1, ptr [[TMP2]], align 4 22; CHECK-NEXT: br label [[BLOCK9]] 23; CHECK: Block9: 24; CHECK-NEXT: [[MUL_VAL:%.*]] = extractvalue { i128, i1 } [[MUL]], 0 25; CHECK-NEXT: ret i128 [[MUL_VAL]] 26; 27Entry: 28 %3 = alloca i128, align 16 29 %4 = alloca i128, align 16 30 store i32 0, ptr %2, align 4 31 %5 = mul i128 %0, %1 32 store i128 %5, ptr %3, align 16 33 %6 = icmp slt i128 %0, 0 34 br i1 %6, label %Then, label %Else 35 36Then: 37 %7 = icmp eq i128 %1, -170141183460469231731687303715884105728 38 br label %Block 39 40Else: 41 br label %Block 42 43Block: 44 %8 = phi i1 [ %7, %Then ], [ false, %Else ] 45 br i1 %8, label %Then1, label %Else2 46 47Then1: 48 br label %Block6 49 50Else2: 51 %9 = icmp ne i128 %0, 0 52 br i1 %9, label %Then3, label %Else4 53 54Then3: 55 %10 = load i128, ptr %3, align 16 56 %11 = sdiv i128 %10, %0 57 %12 = icmp ne i128 %11, %1 58 br label %Block5 59 60Else4: 61 br label %Block5 62 63Block5: 64 %13 = phi i1 [ %12, %Then3 ], [ false, %Else4 ] 65 br label %Block6 66 67Block6: 68 %14 = phi i1 [ true, %Then1 ], [ %13, %Block5 ] 69 br i1 %14, label %Then7, label %Else8 70 71Then7: 72 store i32 1, ptr %2, align 4 73 br label %Block9 74 75Else8: 76 br label %Block9 77 78Block9: ; preds = %Else8, %Then7 79 %15 = load i128, ptr %3, align 16 80 store i128 %15, ptr %4, align 16 81 %16 = load i128, ptr %4, align 16 82 ret i128 %16 83} 84