xref: /llvm-project/llvm/test/Transforms/PartialInlining/switch_stmt.ll (revision f97b8513d25baaac67add4b96ac32d1094d0dc1b)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes="partial-inliner" -skip-partial-inlining-cost-analysis -S < %s | FileCheck %s
3; RUN: opt -passes=partial-inliner -skip-partial-inlining-cost-analysis -S < %s | FileCheck %s
4
5define dso_local signext i32 @callee(i32 signext %c1, i32 signext %c2) !prof !30 {
6; CHECK-LABEL: @callee(
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    [[RC:%.*]] = alloca i32, align 4
9; CHECK-NEXT:    store i32 0, ptr [[RC]], align 4
10; CHECK-NEXT:    switch i32 [[C1:%.*]], label [[SW_DEFAULT:%.*]] [
11; CHECK-NEXT:    i32 0, label [[SW_BB:%.*]]
12; CHECK-NEXT:    i32 1, label [[SW_BB1:%.*]]
13; CHECK-NEXT:    i32 2, label [[SW_BB2:%.*]]
14; CHECK-NEXT:    ], !prof !31
15; CHECK:       sw.bb:
16; CHECK-NEXT:    store i32 1, ptr [[RC]], align 4
17; CHECK-NEXT:    br label [[SW_EPILOG:%.*]]
18; CHECK:       sw.bb1:
19; CHECK-NEXT:    store i32 2, ptr [[RC]], align 4
20; CHECK-NEXT:    br label [[SW_EPILOG]]
21; CHECK:       sw.bb2:
22; CHECK-NEXT:    store i32 4, ptr [[RC]], align 4
23; CHECK-NEXT:    br label [[SW_EPILOG]]
24; CHECK:       sw.default:
25; CHECK-NEXT:    store i32 [[C2:%.*]], ptr [[RC]], align 4
26; CHECK-NEXT:    br label [[SW_EPILOG]]
27; CHECK:       sw.epilog:
28; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RC]], align 4
29; CHECK-NEXT:    ret i32 [[TMP0]]
30;
31entry:
32  %rc = alloca i32, align 4
33  store i32 0, ptr %rc, align 4
34  switch i32 %c1, label %sw.default [
35  i32 0, label %sw.bb
36  i32 1, label %sw.bb1
37  i32 2, label %sw.bb2
38  ], !prof !31
39
40sw.bb: ;; cold
41  store i32 1, ptr %rc, align 4
42  br label %sw.epilog
43
44sw.bb1:
45  store i32 2, ptr %rc, align 4
46  br label %sw.epilog
47
48sw.bb2: ;; cold
49  store i32 4, ptr %rc, align 4
50  br label %sw.epilog
51
52sw.default:
53  store i32 %c2, ptr %rc, align 4
54  br label %sw.epilog
55
56sw.epilog:
57  %0 = load i32, ptr %rc, align 4
58  ret i32 %0
59}
60
61define dso_local signext i32 @caller(i32 signext %c) !prof !30 {
62; CHECK-LABEL: @caller(
63; CHECK-NEXT:  entry:
64; CHECK-NEXT:    [[RC_I:%.*]] = alloca i32, align 4
65; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 4, ptr [[RC_I]])
66; CHECK-NEXT:    store i32 0, ptr [[RC_I]], align 4
67; CHECK-NEXT:    switch i32 [[C:%.*]], label [[SW_DEFAULT_I:%.*]] [
68; CHECK-NEXT:    i32 0, label [[CODEREPL_I:%.*]]
69; CHECK-NEXT:    i32 1, label [[SW_BB1_I:%.*]]
70; CHECK-NEXT:    i32 2, label [[CODEREPL1_I:%.*]]
71; CHECK-NEXT:    ], !prof !31
72; CHECK:       codeRepl.i:
73; CHECK-NEXT:    call void @callee.1.sw.bb(ptr [[RC_I]])
74; CHECK-NEXT:    br label [[CALLEE_1_EXIT:%.*]]
75; CHECK:       sw.bb1.i:
76; CHECK-NEXT:    store i32 2, ptr [[RC_I]], align 4
77; CHECK-NEXT:    br label [[CALLEE_1_EXIT]]
78; CHECK:       codeRepl1.i:
79; CHECK-NEXT:    call void @callee.1.sw.bb2(ptr [[RC_I]])
80; CHECK-NEXT:    br label [[CALLEE_1_EXIT]]
81; CHECK:       sw.default.i:
82; CHECK-NEXT:    store i32 [[C]], ptr [[RC_I]], align 4
83; CHECK-NEXT:    br label [[CALLEE_1_EXIT]]
84; CHECK:       callee.1.exit:
85; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RC_I]], align 4
86; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 4, ptr [[RC_I]])
87;
88entry:
89  %0 = call signext i32 @callee(i32 signext %c, i32 signext %c)
90  ret i32 %0
91}
92
93!llvm.module.flags = !{!0, !1}
94
95!0 = !{i32 1, !"wchar_size", i32 4}
96!1 = !{i32 1, !"ProfileSummary", !2}
97!2 = !{!3, !4, !5, !6, !7, !8, !9, !10, !11, !12}
98!3 = !{!"ProfileFormat", !"InstrProf"}
99!4 = !{!"TotalCount", i64 2}
100!5 = !{!"MaxCount", i64 1000}
101!6 = !{!"MaxInternalCount", i64 1000}
102!7 = !{!"MaxFunctionCount", i64 1000}
103!8 = !{!"NumCounts", i64 4}
104!9 = !{!"NumFunctions", i64 2}
105!10 = !{!"IsPartialProfile", i64 0}
106!11 = !{!"PartialProfileRatio", double 0.000000e+00}
107!12 = !{!"DetailedSummary", !13}
108!13 = !{!14, !15, !16, !17, !18, !19, !20, !21, !22, !23, !24, !25, !26, !27, !28, !29}
109!14 = !{i32 10000, i64 0, i32 0}
110!15 = !{i32 100000, i64 0, i32 0}
111!16 = !{i32 200000, i64 0, i32 0}
112!17 = !{i32 300000, i64 0, i32 0}
113!18 = !{i32 400000, i64 0, i32 0}
114!19 = !{i32 500000, i64 1, i32 2}
115!20 = !{i32 600000, i64 1, i32 2}
116!21 = !{i32 700000, i64 1, i32 2}
117!22 = !{i32 800000, i64 1, i32 2}
118!23 = !{i32 900000, i64 1, i32 2}
119!24 = !{i32 950000, i64 1, i32 2}
120!25 = !{i32 990000, i64 1, i32 2}
121!26 = !{i32 999000, i64 1, i32 2}
122!27 = !{i32 999900, i64 1, i32 2}
123!28 = !{i32 999990, i64 1, i32 2}
124!29 = !{i32 999999, i64 1, i32 2}
125!30 = !{!"function_entry_count", i64 1000}
126!31 = !{!"branch_weights", i32 500, i32 10, i32 150, i32 40}
127