1; Test misexpect handles switch statements when debug information is stripped 2 3; RUN: llvm-profdata merge %S/Inputs/misexpect-switch.proftext -o %t.profdata 4 5; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -pgo-warn-misexpect -S 2>&1 | FileCheck %s --check-prefix=WARNING 6; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -pass-remarks=misexpect -S 2>&1 | FileCheck %s --check-prefix=REMARK 7; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -pgo-warn-misexpect -pass-remarks=misexpect -S 2>&1 | FileCheck %s --check-prefix=BOTH 8; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -S 2>&1 | FileCheck %s --check-prefix=DISABLED 9 10; WARNING-DAG: warning: <unknown>:0:0: 0.00% 11; WARNING-NOT: remark: <unknown>:0:0: Potential performance regression from use of the llvm.expect intrinsic: Annotation was correct on 0.00% (0 / 27943) of profiled executions. 12 13; REMARK-NOT: warning: <unknown>:0:0: 0.00% 14; REMARK-DAG: remark: <unknown>:0:0: Potential performance regression from use of the llvm.expect intrinsic: Annotation was correct on 0.00% (0 / 27943) of profiled executions. 15 16; BOTH-DAG: warning: <unknown>:0:0: 0.00% 17; BOTH-DAG: remark: <unknown>:0:0: Potential performance regression from use of the llvm.expect intrinsic: Annotation was correct on 0.00% (0 / 27943) of profiled executions. 18 19; DISABLED-NOT: warning: <unknown>:0:0: 0.00% 20; DISABLED-NOT: remark: <unknown>:0:0: Potential performance regression from use of the llvm.expect intrinsic: Annotation was correct on 0.00% (0 / 27943) of profiled executions. 21 22; DISABLED-NOT: warning: <unknown>:0:0: 0.00% 23; DISABLED-NOT: remark: <unknown>:0:0: Potential performance regression from use of the llvm.expect intrinsic: Annotation was correct on 0.00% (0 / 27943) of profiled executions. 24 25; CORRECT-NOT: warning: {{.*}} 26; CORRECT-NOT: remark: {{.*}} 27 28 29; ModuleID = 'misexpect-switch.c' 30source_filename = "misexpect-switch.c" 31target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 32target triple = "x86_64-unknown-linux-gnu" 33 34@inner_loop = dso_local constant i32 1000, align 4 35@outer_loop = dso_local constant i32 20, align 4 36@arry_size = dso_local constant i32 25, align 4 37@arry = dso_local global [25 x i32] zeroinitializer, align 16 38 39; Function Attrs: nounwind uwtable 40define dso_local void @init_arry() #0 { 41entry: 42 %i = alloca i32, align 4 43 call void @llvm.lifetime.start.p0(i64 4, ptr %i) #6 44 store i32 0, ptr %i, align 4, !tbaa !4 45 br label %for.cond 46 47for.cond: ; preds = %for.inc, %entry 48 %0 = load i32, ptr %i, align 4, !tbaa !4 49 %cmp = icmp slt i32 %0, 25 50 br i1 %cmp, label %for.body, label %for.end 51 52for.body: ; preds = %for.cond 53 %call = call i32 @rand() #6 54 %rem = srem i32 %call, 10 55 %1 = load i32, ptr %i, align 4, !tbaa !4 56 %idxprom = sext i32 %1 to i64 57 %arrayidx = getelementptr inbounds [25 x i32], ptr @arry, i64 0, i64 %idxprom 58 store i32 %rem, ptr %arrayidx, align 4, !tbaa !4 59 br label %for.inc 60 61for.inc: ; preds = %for.body 62 %2 = load i32, ptr %i, align 4, !tbaa !4 63 %inc = add nsw i32 %2, 1 64 store i32 %inc, ptr %i, align 4, !tbaa !4 65 br label %for.cond 66 67for.end: ; preds = %for.cond 68 call void @llvm.lifetime.end.p0(i64 4, ptr %i) #6 69 ret void 70} 71 72; Function Attrs: argmemonly nounwind willreturn 73declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 74 75; Function Attrs: nounwind readnone speculatable willreturn 76declare void @llvm.dbg.declare(metadata, metadata, metadata) #2 77 78; Function Attrs: nounwind 79declare dso_local i32 @rand() #3 80 81; Function Attrs: argmemonly nounwind willreturn 82declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 83 84; Function Attrs: nounwind uwtable 85define dso_local i32 @main() #0 { 86entry: 87 %retval = alloca i32, align 4 88 %val = alloca i32, align 4 89 %j = alloca i32, align 4 90 %condition = alloca i32, align 4 91 store i32 0, ptr %retval, align 4 92 call void @init_arry() 93 call void @llvm.lifetime.start.p0(i64 4, ptr %val) #6 94 store i32 0, ptr %val, align 4, !tbaa !4 95 call void @llvm.lifetime.start.p0(i64 4, ptr %j) #6 96 store i32 0, ptr %j, align 4, !tbaa !4 97 br label %for.cond 98 99for.cond: ; preds = %for.inc, %entry 100 %0 = load i32, ptr %j, align 4, !tbaa !4 101 %cmp = icmp slt i32 %0, 20000 102 br i1 %cmp, label %for.body, label %for.end 103 104for.body: ; preds = %for.cond 105 call void @llvm.lifetime.start.p0(i64 4, ptr %condition) #6 106 %call = call i32 @rand() #6 107 %rem = srem i32 %call, 5 108 store i32 %rem, ptr %condition, align 4, !tbaa !4 109 %1 = load i32, ptr %condition, align 4, !tbaa !4 110 %conv = zext i32 %1 to i64 111 %expval = call i64 @llvm.expect.i64(i64 %conv, i64 6) 112 switch i64 %expval, label %sw.default [ 113 i64 0, label %sw.bb 114 i64 1, label %sw.bb2 115 i64 2, label %sw.bb2 116 i64 3, label %sw.bb2 117 i64 4, label %sw.bb3 118 ] 119 120sw.bb: ; preds = %for.body 121 %call1 = call i32 @sum(ptr @arry, i32 25) 122 %2 = load i32, ptr %val, align 4, !tbaa !4 123 %add = add nsw i32 %2, %call1 124 store i32 %add, ptr %val, align 4, !tbaa !4 125 br label %sw.epilog 126 127sw.bb2: ; preds = %for.body, %for.body, %for.body 128 br label %sw.epilog 129 130sw.bb3: ; preds = %for.body 131 %call4 = call i32 @random_sample(ptr @arry, i32 25) 132 %3 = load i32, ptr %val, align 4, !tbaa !4 133 %add5 = add nsw i32 %3, %call4 134 store i32 %add5, ptr %val, align 4, !tbaa !4 135 br label %sw.epilog 136 137sw.default: ; preds = %for.body 138 unreachable 139 140sw.epilog: ; preds = %sw.bb3, %sw.bb2, %sw.bb 141 call void @llvm.lifetime.end.p0(i64 4, ptr %condition) #6 142 br label %for.inc 143 144for.inc: ; preds = %sw.epilog 145 %4 = load i32, ptr %j, align 4, !tbaa !4 146 %inc = add nsw i32 %4, 1 147 store i32 %inc, ptr %j, align 4, !tbaa !4 148 br label %for.cond 149 150for.end: ; preds = %for.cond 151 call void @llvm.lifetime.end.p0(i64 4, ptr %j) #6 152 call void @llvm.lifetime.end.p0(i64 4, ptr %val) #6 153 ret i32 0 154} 155 156; Function Attrs: nounwind readnone willreturn 157declare i64 @llvm.expect.i64(i64, i64) #4 158 159declare dso_local i32 @sum(ptr, i32) #5 160 161declare dso_local i32 @random_sample(ptr, i32) #5 162 163attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } 164attributes #1 = { argmemonly nounwind willreturn } 165attributes #2 = { nounwind readnone speculatable willreturn } 166attributes #3 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } 167attributes #4 = { nounwind readnone willreturn } 168attributes #5 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } 169attributes #6 = { nounwind } 170 171!llvm.module.flags = !{!0, !1, !2} 172!llvm.ident = !{!3} 173 174!0 = !{i32 2, !"Dwarf Version", i32 4} 175!1 = !{i32 2, !"Debug Info Version", i32 3} 176!2 = !{i32 1, !"wchar_size", i32 4} 177!3 = !{!"clang version 10.0.0 (60b79b85b1763d3d25630261e5cd1adb7f0835bc)"} 178!4 = !{!5, !5, i64 0} 179!5 = !{!"int", !6, i64 0} 180!6 = !{!"omnipotent char", !7, i64 0} 181!7 = !{!"Simple C/C++ TBAA"} 182